Hardware Architecture Validity Rules

Concept

Hardware Architecture Validity Rules are architectural constraints used in model-based random stimuli generation to ensure generated hardware tests remain valid with respect to the design under test. Examples include memory-address formation, atomicity conditions for aligned Load-Word instructions, and exception behavior for privileged instructions in user mode.

First seen 5/26/2026

Last seen 5/26/2026

Evidence 1 chunks

Wiki v1

WIKI

Hardware Architecture Validity Rules

Hardware Architecture Validity Rules are constraints that describe valid behavior imposed by a hardware architecture during model-based random stimuli generation. In the cited IBM/AAAI context, these rules are distinguished from user requests and expert knowledge: user requests describe desired scenarios, expert knowledge expresses probabilistic or coverage-oriented preferences, and architectural validity rules encode requirements that generated tests must satisfy to be architecturally meaningful.

Role in model-based stimuli generation

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RELATIONSHIPS

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Knowledge Base part of → 90% 1e

The knowledge base contains the declarative architectural description including validity rules.

LINKED ENTITIES

3 links

Model-based Stimuli Generation used_in The evidence explicitly describes architectural validity rules in the context of model-based stimuli generation and states that the generator must satisfy validity rules.

Knowledge Base stored_in The evidence states that the knowledge base contains the declarative architectural description of the design under test and the expert knowledge repository.

Functional Reference Model used_with The evidence states that the generator uses a functional reference model to calculate resource values after each generated transaction and compare them with simulator results.

CITATIONS

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5 citations — click to expand

[1] Architectural validity examples include address formation, aligned Load-Word atomicity, and privileged-instruction exception behavior. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[2] Model-based stimuli generation separates a generic engine from an input model describing the hardware architecture and expert knowledge. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[3] A stated generation challenge is satisfying all user-defined and validity rules and as many expert-knowledge rules as possible. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[4] The knowledge base contains the declarative architectural description of the design under test and the expert-knowledge repository. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[5] Generated tests contain hardware transactions sent to a design simulator, and a functional reference model computes resource values used for subsequent generation and comparison with simulator results. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI