focus register

Concept

A focus register is the operand register whose value is intentionally modified and later restored in REVERSI-style self-test programs; in PATARA-based hazard tests it is normally placed in the first source-operand position, but can be swapped with random data to exercise forwarding paths for both source operands.

First seen 5/28/2026

Last seen 6/1/2026

Evidence 4 chunks

Wiki v1

WIKI

Overview

In the cited RISC-V self-testing framework, the focus register is the register that carries the value under test through a reversible instruction sequence. In REVERSI, a modification operation applies the test instruction to a focus value together with random data, and a later restoring operation reconstructs the original focus value so the framework can check whether execution was error-free.

Role in REVERSI

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NEIGHBORHOOD

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RELATIONSHIPS

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REVERSI ← uses 95% 1e

REVERSI's modification operation uses a focus register as a source operand.

PATARA ← uses 90% 1e

PATARA uses focus register and random register swapping to test data forwarding paths.

LINKED ENTITIES

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REVERSI USES Extracted graph relationship

PATARA USES Extracted graph relationship

CITATIONS

5 sources

5 citations — click to expand

[1] In REVERSI, the modification operation uses a focus register and random register as source operands, writes to a target register, and later compares the restored result against the focus register. A Self-Testing Framework for Verification and Validation of a RISC-V-Based System with a Co-processor | International Journal of Parallel Programming | Springer Nature Link

[2] REVERSI uses the focus register as the value under test in a reversible modification/restoring sequence to detect execution errors. A Self-Testing Framework for Verification and Validation of a RISC-V-Based System with a Co-processor | International Journal of Parallel Programming | Springer Nature Link

[3] For some instructions, additional control code is added so the focus register remains fully restorable. A Self-Testing Framework for Verification and Validation of a RISC-V-Based System with a Co-processor | International Journal of Parallel Programming | Springer Nature Link

[4] In regular PATARA test cases, the focus register is always the first source operand, while the second source operand supplies random data. A Self-Testing Framework for Verification and Validation of a RISC-V-Based System with a Co-processor | International Journal of Parallel Programming | Springer Nature Link

[5] PATARA can swap the focus and random operands to test forwarding hazard detection on both source operands, and the swap probability is configurable. A Self-Testing Framework for Verification and Validation of a RISC-V-Based System with a Co-processor | International Journal of Parallel Programming | Springer Nature Link