Overview
Directed tests are verification tests aimed at specific scenarios rather than broad random exploration. In the available RISC-V vector accelerator verification evidence, scenarios involving different vstart values were explicitly covered by directed tests that were added to the regression suite so those scenarios would be checked on every RTL change.
Use in RISC-V vector accelerator verification
In the cited verification flow, retries were an important source of complexity. A retry occurred when the vector processing unit could not handle all loaded cache lines sent by the scalar core. The instruction then completed with a vstart value identifying the first element that could not be written to the vector registers, indicating that the instruction had to be re-executed from that element.
The paper reports that retry behavior and vstart calculation were error-prone, especially when memory exceptions for multiple in-flight loads and stores were randomized and failing instructions had to be killed. To preserve coverage of known important retry scenarios, directed tests with different vstart values were added to the regression suite and run to ensure those scenarios remained valid after RTL changes.
Relationship to regression testing
The evidence places directed tests inside a broader continuous integration and regression strategy. The CI infrastructure generated random tests with RISCV-DV, classified tests as passed or failed, selected regression sets based on collected coverage, and ran regressions on DUT changes. Directed tests complemented this flow by keeping specific vstart scenarios in the regression suite rather than relying only on random generation to revisit them.