Overview

Data Cache Miss Rate is a performance metric that measures the proportion of data memory references that cannot be satisfied by a given level of the CPU data cache and therefore must be resolved by a higher (slower) level of the memory hierarchy. It is the complement of the data cache hit rate for that level: miss_rate = 1 − hit_rate. The metric is commonly tracked separately per cache level (e.g., L1 and L2 data-cache miss rates) because the latency penalty and the access pattern that produces misses differ substantially between levels.

In workload-synthesis and characterization research, data cache miss rate is treated as a first-order knob because memory hierarchy behavior is widely recognized as a major determinant of application performance. [Citation: Genesys paper, Methodology section]