Code Fragment
ConceptIn the context of the RVVTS testing framework, a Code Fragment is an indivisible sequence of one or more assembler instructions implementing a single conceptual operation. Code Fragments are the fundamental building blocks of Code Blocks and are generated, manipulated, and reduced by the framework's grammar-based Instruction Sequence Generator (ISG) and code-reduction pipelines.
First seen 7/19/2026
Last seen 7/19/2026
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Definition
A Code Fragment in RVVTS is defined as an indivisible sequence of at least one assembler instruction implementing an operation [1]. It is the atomic unit used to organize and handle assembler code inside the framework.
Examples drawn from the RISC-V Vector (RVV) extension include:
NEIGHBORHOOD
2 nodes · 1 edgesgraph · Code Fragment · depth=1
RELATIONSHIPS
1 connectionsRVVTS uses Code Fragments to organize assembler code.
LINKED ENTITIES
1 linksCITATIONS
11 sources11 citations — click to expand
[1] A Code Fragment is an indivisible sequence of at least one assembler instruction implementing an operation. Single Instruction Isolation for RISC-V Vector Test Failures
[2] A Code Fragment for an RVV add operation contains a single vector add assembler instruction, while a Code Fragment for an RVV bounded load/store operation contains multiple assembler instructions to realize the bounding and a vector load/store instruction. Single Instruction Isolation for RISC-V Vector Test Failures
[3] A Code Block contains a sequence of Code Fragments and forms an entity that can be executed on a RISC-V machine by RVVTS. Single Instruction Isolation for RISC-V Vector Test Failures
[4] The RVVTS ISG uses a context-free grammar to generate Code Fragments by randomly expanding non-terminal symbols until only terminal symbols remain. Single Instruction Isolation for RISC-V Vector Test Failures
[5] The ISG extends its context-free grammar with special function symbols bound to Python functions to provide context-sensitive expressiveness for complex sequences such as bounded values and bounded load/stores. Single Instruction Isolation for RISC-V Vector Test Failures
[6] Delta Code Reduction isolates a failing Code Fragment via a binary search that tracks good/bad code positions and halving the search area each iteration. Single Instruction Isolation for RISC-V Vector Test Failures
[7] After Delta Code Reduction the Code Block contains non-failing Code Fragments followed by a single failing Code Fragment at the end. Single Instruction Isolation for RISC-V Vector Test Failures
[8] In the Extension phase, the ISG inserts a newly generated Code Fragment at a random position; it is accepted only if Machine State is valid and coverage is maintained or improved. Single Instruction Isolation for RISC-V Vector Test Failures
[9] In the Reduction phase, a random Code Fragment is removed from a copy of the Code Block and the resulting block is kept only if validity and coverage requirements are satisfied. Single Instruction Isolation for RISC-V Vector Test Failures
[10] In static-analysis validation work, code fragments are syntactically valid, semantic-preserving executable snippets generated from static warnings and tested with fuzzers, KLEE, and Valgrind. Validating Static Warnings via Testing Code Fragments
[11] In code-clone research, code fragments of detected clones are treated as sequences of words to enable topic-based clustering and informative tagging. Towards Informative Tagging of Code Fragments to Support the Investigation of Code Clones