Code Block

Concept

In RVVTS, a Code Block is an executable sequence of Code Fragments (assembler instructions) that forms the unit of code manipulation, execution, and analysis within the framework's Single Instruction Isolation, Code Minimization, and Coverage-Guided Testset Generation techniques.

First seen 7/19/2026

Last seen 7/19/2026

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Code Block

Definition

In the RVVTS (RISC-V Vector Test Set) framework, a Code Block is a sequence of Code Fragments that forms an entity which can be executed on a RISC-V machine. A Code Fragment itself is an indivisible sequence of at least one assembler instruction implementing a specific operation — for example, a single RVV vector add instruction, or the multiple instructions needed to realize a bounded vector load/store operation together with the bounding logic. Code Blocks organize and handle assembler code used by RVVTS.

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NEIGHBORHOOD

2 nodes · 1 edges

graph · Code Block · depth=1

RELATIONSHIPS

1 connections

RVVTS ← uses 100% 1e

RVVTS uses Code Blocks to organize sequences of Code Fragments.

LINKED ENTITIES

1 links

RVVTS USES Extracted graph relationship

CITATIONS

10 sources

10 citations — click to expand

[1] A Code Block is a sequence of Code Fragments that forms an entity which can be executed on a RISC-V machine. Single Instruction Isolation for RISC-V Vector Test Failures

[2] A Code Fragment is an indivisible sequence of at least one assembler instruction implementing an operation (e.g., a single vector add, or multiple instructions for a bounded load/store). Single Instruction Isolation for RISC-V Vector Test Failures

[3] Code Blocks can be created manually, loaded from files, or created automatically by the ISG or through Code Minimization. Single Instruction Isolation for RISC-V Vector Test Failures

[4] The CodeErrMinRunner first uses a CodeCompareRunner to determine whether there are deviations in the Machine State for a Code Block; if a deviation occurs the run is a fail and the Code Block is passed to Delta Code Reduction. Single Instruction Isolation for RISC-V Vector Test Failures

[5] Delta Code Reduction uses a binary search algorithm over Code Fragments to isolate a single failing Code Fragment via a CodeCompareRunner. Single Instruction Isolation for RISC-V Vector Test Failures

[6] Code Minimization splits the reduced Code Block into non-failing fragments plus the single failing fragment, executes the first block with a CodeCheckRunner to extract a Machine State, and combines generated initialization with the failing fragment to produce a minimized Code Block. Single Instruction Isolation for RISC-V Vector Test Failures

[7] CovGuidedTestsetGenerator alternates between an Extension phase (inserting new Code Fragments while maintaining/improving coverage) and a Reduction phase (removing random Code Fragments while preserving coverage) to produce dense Code Blocks. Single Instruction Isolation for RISC-V Vector Test Failures

[8] Any generated Code Block must be compilable and executable, and a Boolean switch controls whether the Code Block is allowed to cause traps in execution. Single Instruction Isolation for RISC-V Vector Test Failures

[9] TestsetCodeErrMinRunner executes a series of Code Blocks provided as files and collects all results, including reduced and minimized Code Blocks. Single Instruction Isolation for RISC-V Vector Test Failures

[10] Table 1 reports Code Fragment counts, RVV instruction counts, and functional coverage percentages for pre-generated Valid Sequences test sets on RV32 and RV64. Single Instruction Isolation for RISC-V Vector Test Failures