Definition

A bit vector stimulus is a processor-verification stimulus represented as bit vectors and applied to the input ports of a processor. In the cited processor-verification context, stimuli may take multiple forms; bit-vector application to input ports is one example, while another is a program loaded directly into program memory. [C1]

Verification context

Bit vector stimuli appear in simulation-based processor verification, where stimuli are generated, applied to processor inputs, and evaluated by monitoring achieved functional coverage to assess verification completeness. [C2]

The same evidence describes a common workflow in which pseudorandom generators produce stimuli for processor verification. It also describes an automation technique that dynamically alters constraints for a pseudorandom generator using a recurrent neural network that receives coverage feedback from simulation of the design under verification. [C3]

Relationship to other stimulus forms

The evidence distinguishes bit-vector stimuli from program-based stimuli:

• Bit vector form: bit vectors are applied to the processor input ports. [C1]
• Program form: programs are loaded directly into program memory. [C1]

Coverage and regression relevance

In the reported processor-verification study, experiments showed faster coverage closure and the ability to isolate a small set of high-coverage stimuli for regression tests. The evidence states this result for stimuli in the verification flow generally, not specifically for bit-vector stimuli alone. [C4]