Bit vector stimulus
ConceptA bit vector stimulus is a form of verification stimulus for processor simulation in which the stimulus is represented as bit vectors applied to the processor input ports.
First seen 5/26/2026
Last seen 5/26/2026
Evidence 2 chunks
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WIKI
Definition
A bit vector stimulus is a processor-verification stimulus represented as bit vectors and applied to the input ports of a processor. In the cited processor-verification context, stimuli may take multiple forms; bit-vector application to input ports is one example, while another is a program loaded directly into program memory. [C1]
Verification context
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1 connectionsThe paper mentions bit vectors as one form that stimuli can take when applied to processor input ports.
CITATIONS
4 sources4 citations — click to collapse
[1] C1: Processor verification stimuli can be represented as bit vectors applied to processor input ports, or as programs loaded directly into program memory. Automation of Processor Verification Using Recurrent Neural Networks
[2] C2: In simulation-based processor verification, generated stimuli are applied to processor inputs and achieved functional coverage is monitored to determine verification completeness. Automation of Processor Verification Using Recurrent Neural Networks
[3] C3: The referenced work proposes dynamically altering pseudorandom-generator constraints via a recurrent neural network that receives coverage feedback from simulation of the design under verification. Automation of Processor Verification Using Recurrent Neural Networks
[4] C4: The reported experiments achieved coverage closure sooner and isolated a small set of high-coverage stimuli usable for regression tests. Automation of Processor Verification Using Recurrent Neural Networks