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Bit manipulation constraints

Concept

Bit manipulation constraints are constraints over fixed-size typed variables that involve operations on bit vectors, such as bit extraction and concatenation. In the cited STCS work, they are treated specially because reducing them to independent per-bit constraints does not combine well with arithmetic constraints and can lose domain-reduction opportunities.

First seen 5/31/2026
Last seen 6/5/2026
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WIKI

Bit manipulation constraints are a class of constraints over fixed-size variables that operate directly on their bit-level structure rather than only on numeric ranges. In the cited work, the examples given are bit extraction and bit concatenation: X = Y[5:3] denotes that X is the slice made of bits 3 to 5 of Y, and X = (Y:Z) denotes that X is the concatenation of Y and Z. These constraints arise from hardware-description-style operations and therefore require dedicated support in the solver.[1]

The source explains that handling such constraints as separate independent constraints on individual bits is not sufficient when the same variables also participate in arithmetic constraints. A purely bit-vector decomposition, as described in prior work cited by the source, "cannot be combined with arithmetic constraints on the same variable" and therefore prevents some possible domain reductions.[2]

The same discussion places bit manipulation constraints alongside other fixed-width typing issues, including casts between variables of different bit sizes. Because casting can lose information—for example by truncating a higher-order bit—domain reasoning must account for both arithmetic intervals and bit-level structure.[3]

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RELATIONSHIPS

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STCS ← implements 100% 4e
STCS implements specific bit manipulation constraints for hardware descriptions.
The paper introduces and uses specific bit manipulation constraints in the solver.

CITATIONS

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4 citations — click to collapse
[1] Bit manipulation constraints in the cited work include bit extraction `X = Y[5:3]` and concatenation `X = (Y:Z)` on fixed-size variables. Fabrice.Baray,Henri.Michel
[2] Treating variables as bit vectors with independent per-bit constraints cannot be combined with arithmetic constraints on the same variable and prevents some domain reductions. Fabrice.Baray,Henri.Michel
[3] Casting between fixed-size typed variables can lose information on domain values, such as when a higher-order bit is truncated. Fabrice.Baray,Henri.Michel
[4] STCS introduces specific constraints including logical AND, logical shift, bit concatenation, and bit extraction, and uses both interval and bit representations for variable domains with coherence maintained between them. Fabrice.Baray,Henri.Michel