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Bayesian Network-based Coverage-directed Test Generation

Concept WIKI v1 · 6/3/2026

Bayesian Network-based Coverage-directed Test Generation (CDG) is a functional hardware verification technique introduced by Fine and Ziv at DAC 2003, which uses Bayesian networks to guide test generation toward coverage goals. It belongs to the broader family of coverage-directed test generation methods and is cited as foundational work by subsequent randomized and coverage-guided verification approaches.

Bayesian Network-based Coverage-directed Test Generation

Overview

Bayesian Network-based Coverage-directed Test Generation (CDG) is a functional verification technique that uses Bayesian networks to model the relationship between test program parameters and the resulting functional coverage, in order to steer test generation toward under-covered parts of a design's state space. The approach was introduced by S. Fine and A. Ziv in the paper "Coverage directed test generation for functional verification using bayesian networks," presented at the Design Automation Conference (DAC) in 2003, pages 286–291 [9].

Role within Coverage-directed Test Generation

Coverage-directed test generation is a family of techniques that uses feedback from coverage metrics to drive the creation of subsequent test stimuli, rather than relying purely on randomized or directed manual test programs. The Bayesian network variant, as proposed by Fine and Ziv, learns a probabilistic model that captures how choices in the test generator's parameter space influence which coverage points are exercised, and then uses this model to bias future test generation toward coverage holes.

Citation Context

In the DATE 2022 paper "Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging", Fine and Ziv's Bayesian network-based CDG paper is listed as reference [9] and grouped among other coverage-directed and feedback-based test generation works in the verification literature [3, 5, 10]. This indicates that the Bayesian network approach is part of the established lineage of CDG methods that informed later endless-stream and coverage-guided approaches.

Relationship to Coverage-guided Aging

The DATE 2022 paper contrasts the limitations of a static randomized test strategy—which does not change over time and therefore tends to favor specific test state spaces—with a Coverage-guided Aging mechanism that is designed to keep coverage balanced across instruction group combinations in an endless instruction stream [evidence]. Both approaches fall under the broader umbrella of coverage-directed test generation that the Fine and Ziv Bayesian-network work helped establish, although they address different settings: the Bayesian network method targets a finite-run scenario with re-adjustment between runs, while Coverage-guided Aging targets endless streams where no per-run readjustment is available.

LINKED ENTITIES

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Cross-level processor verification via endless randomized instruction stream generation with coverage-guided aging MENTIONS

CITATIONS

4 sources
4 citations
[1] Fine and Ziv introduced coverage directed test generation for functional verification using Bayesian networks at DAC 2003, pages 286–291. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging (DATE 2022), Reference [9]
[2] Bayesian network-based CDG is cited among the broader family of coverage-directed and feedback-based test generation works in the DATE 2022 paper's reference list. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging (DATE 2022)
[3] Static randomized test strategies tend to favor specific test state spaces and do not change over time, motivating the use of coverage-directed approaches. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging (DATE 2022)
[4] Coverage-guided Aging provides a more balanced coverage profile than a static random generator for endless instruction streams, with no visible gaps in instruction group combinations. Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging (DATE 2022)