Skip to content
STIMSMITH

ARM ISA

Concept

The ARM Instruction Set Architecture (ISA) is the silicon chip ISA developed and licensed by ARM Limited, and forms the target of the gem5 VLSI digital circuit simulator employed by ARM to test their systems. In the SearchSYS/SearchGEM5 research artifact, testing of the gem5 simulator focuses on the simulation of the ARM ISA, using differential testing between real ARM hardware and gem5 running in build/ARM configuration.

First seen 8/12/2026
Last seen 8/12/2026
Evidence 3 chunks
Wiki v1

WIKI

ARM ISA

Overview

The ARM Instruction Set Architecture (ISA) is the silicon chip ISA associated with ARM Limited. In the context of the SearchSYS/SearchGEM5 artifact (Even-Mendoza et al., ICSE-SEIP 2025), the ARM ISA is the specific architecture targeted by the gem5 VLSI digital circuit simulator that ARM employs to test their systems. The work explicitly focuses on the simulation of the ARM silicon chip ISA within gem5 and uses differential testing between the simulator and real ARM hardware to surface simulator bugs.

Role in the SearchSYS Artifact

The artifact at Zenodo record 14721385 describes reproducing the evaluation on ARM machines (arm64-ubuntu-2204 and Red Hat-based systems). To test the ARM ISA, gem5 must be built targeting the ARM architecture rather than X86, using SCons:

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

CITATIONS

6 sources
6 citations — click to expand
[1] The ARM ISA is the silicon chip Instruction Set Architecture whose simulation by gem5 is the focus of the SearchSYS testing work. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo
[2] gem5 is built for the ARM ISA via the SCons target build/ARM/gem5.opt, using AFL++ wrappers (afl-cc, afl-c++) when AFL++ instrumentation is desired. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo
[3] The gem5 ARM build's license banner lists ARM Limited as a copyright holder (2009-2011) alongside other gem5 contributors. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo
[4] Reproducing ARM ISA testing requires an ARM machine with 80 GB free disk and 72 GB RAM for AFL++ fuzzing, or 16 GB RAM for differential testing without AFL++ instrumentation of gem5. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo
[5] The supported operating systems for ARM ISA evaluation are Ubuntu (arm64-ubuntu-2204) and Red Hat-based systems, tested with GCC-11, LLVM-13, and Python 3.8/3.10. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo
[6] SearchSYS combines LLMs, fuzzing, and differential testing to find bugs in gem5's ARM ISA simulation; 4 unique bugs were reported and acknowledged by developers. Artifact of Search+LLM-based Testing for ARM Simulators - Zenodo