Application Scheduling

Concept

Application scheduling is a design and compilation step in which the operations of an application are mapped onto the computational resources of a target architecture, taking into account resource availability, dependencies, and the cost of routing or binding. It is a recurring problem in both classical software schedulability analysis (e.g., under variable processor frequencies) and in specialized compilation flows for accelerators built around custom instructions, reconfigurable cells, or computing-in-memory (CIM) fabrics.

First seen 6/9/2026

Last seen 6/9/2026

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Application Scheduling

Definition

Application scheduling refers to the process of assigning the operations of an application — represented either as a graph of tasks or as a graph of computational patterns — to the available computational resources of a target architecture while respecting dependencies and constraints. In compilation-oriented contexts, it is typically performed jointly with related decisions such as instruction selection, binding (assignment of operations to specific functional units), and routing (placement/connection of operations on spatial resources).

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IFPEC ← uses 100% 1e

IFPEC handles application scheduling as part of its design flow.

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IFPEC USES Extracted graph relationship

CITATIONS

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[1] IFPEC is a constraint-programming design framework that performs application scheduling jointly with extension identification/selection, binding, and routing, using graph-based representations and subgraph isomorphism / connected component constraints. Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation

[2] In IFPEC, the expressiveness of the CP framework allows extension selection, application scheduling, and binding to be solved simultaneously, improving the quality of generated results. Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation

[3] The architectures targeted by IFPEC's application scheduling consist of runtime reconfigurable cells implementing selected processor extensions, tightly connected to a host processor. Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation

[4] Software schedulability at varied processor frequencies can be estimated experimentally by injecting additional high-priority workload to emulate frequency reduction, and such estimates inform DVS/DFS control algorithms. Experimental Software Schedulability Estimation For Varied Processor Frequencies

[5] Application scheduling is a key compilation optimization target for computing-in-memory (CIM) accelerators, and the CMSwitch compiler integrates compute–memory mode switching into the scheduling optimization space to better serve DNN applications. Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators