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ALU32

Concept WIKI v1 · 6/18/2026

ALU32 is a 32-bit combinational arithmetic logic unit included as one of five device-under-test (DUT) designs in the DVSBench benchmark suite used to evaluate the StimulusRL deep-reinforcement-learning stimulus agent for coverage-driven chip design verification. In StimulusRL evaluations, ALU32's combinational nature causes bugs to be triggered almost immediately by nearly any stimulus method, making it a benchmark case where random exploration performs comparably to learned policies.

ALU32

Overview

ALU32 is a 32-bit combinational arithmetic logic unit (ALU) design that appears as one of the five device-under-test (DUT) configurations in the DVSBench benchmark suite. It is used as a verification workload for evaluating stimulus-generation methods, including the deep-reinforcement-learning agent StimulusRL and three baseline generators (Random, CRV, and CGM-Fuzz).

The DUT is characterized in DVSBench with the following parameters:

Property Value
Description 32-bit ALU (combinational)
#Actions 56
Observation dimension 6
#Coverage bins 23
#Bug variants 3

Source: DVSBench benchmark suite specification in the StimulusRL paper (Tables 1 and 4).

Stimulus action encoding

The ALU32 stimulus action set combines one of seven operations with eight operand-pattern classes (zero/one, sign extremes, alternating bits, and randomized subranges), yielding a discretized action space of 56 legal or semi-legal stimulus combinations. Action legality constraints are enforced to preserve transaction structure while still allowing aggressive exploration.

Source: DVSBench stimulus encoding description in the StimulusRL paper.

Injected bug variants

Three bug variants are injected into the ALU32 DUT for differential bug-finding evaluation:

Bug ID Injected defect Primary observable mismatch
ALU32-1 SUB implemented as ADD result mismatch
ALU32-2 Overflow flag computed incorrectly flag mismatch
ALU32-3 Shift-right implemented as shift-left result mismatch

Source: StimulusRL paper, Table 4.

Experimental results on ALU32

Functional coverage and coverage AUC

Final functional coverage after 2000 simulation steps (mean ± std, n=3):

Method Final coverage Coverage AUC
Random 1.000 ± 0.000 0.995 ± 0.001
CRV 1.000 ± 0.000 0.995 ± 0.001
CGM-Fuzz 1.000 ± 0.000 0.995 ± 0.002
StimulusRL (DQN) 1.000 ± 0.000 0.990 ± 0.000

All four stimulus-generation methods achieve full functional coverage on ALU32, with StimulusRL's slightly lower AUC reflecting that the DQN policy prioritizes a coverage-efficient subset of operand patterns rather than uniform exploration.

Source: StimulusRL paper, Tables 5 and 6.

Runtime

Wall-clock runtime per 2000-step run (seconds, mean ± std, n=3):

Method Runtime (s)
Random 0.052 ± 0.004
CRV 0.097 ± 0.005
CGM-Fuzz 0.047 ± 0.004
StimulusRL (DQN) 1.264 ± 0.092

ALU32 is the fastest DUT in the suite because of its combinational (non-sequential) nature, but StimulusRL's neural-network inference still adds roughly an order of magnitude of overhead relative to the lightweight baselines.

Source: StimulusRL paper, Table 7.

Bug-finding behavior

Bug-finding success rate within 2000 steps (averaged over 3 bug variants; n=9 trials per DUT×method):

Method Success rate
Random 1.000
CRV 1.000
CGM-Fuzz 1.000
StimulusRL (DQN) 1.000

Mean steps to first detected mismatch (successful trials only; averaged over 3 bug variants):

Method Mean steps to bug
Random 8.8
CRV 8.8
CGM-Fuzz 8.6
StimulusRL (DQN) 71.9

Source: StimulusRL paper, Tables 8 and 9.

Discussion: combinational bugs and overfitting

The ALU32 results illustrate a characteristic failure mode of coverage-driven RL stimulus generation on easy-to-trigger combinational bugs. The paper notes:

"For easy-to-trigger combinational bugs (ALU32), random exploration finds mismatches rapidly; RL may overfit to a coverage-efficient subset of patterns and thus delay bug exposure."

Because ALU32 bugs manifest within the first few cycles of nearly any operand combination, random sampling reaches the mismatch in under 10 steps on average, while StimulusRL's DQN — optimized for incremental coverage gain — collapses toward a narrower subset of stimulus patterns and consequently requires substantially more steps to encounter the injected defects, even though it still succeeds within the 2000-step budget.

Source: StimulusRL paper, Discussion section.

See also

  • DVSBench — the benchmark suite to which ALU32 belongs.
  • StimulusRL — the deep-RL stimulus agent evaluated on ALU32.

CITATIONS

7 sources
7 citations
[1] ALU32 is a 32-bit combinational ALU DUT in the DVSBench benchmark suite with 56 actions, 6-dim observations, 23 coverage bins, and 3 injected bug variants. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[2] ALU32 actions encode one of seven ALU operations combined with eight operand-pattern classes (zero/one, sign extremes, alternating bits, randomized subranges). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[3] Three bug variants are injected into ALU32: SUB implemented as ADD, overflow flag computed incorrectly, and shift-right implemented as shift-left. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[4] All four stimulus-generation methods achieve 1.000 final functional coverage on ALU32, with StimulusRL reporting a slightly lower coverage AUC (0.990) than Random/CRV/CGM-Fuzz (0.995). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[5] Per-2000-step wall-clock runtime on ALU32 is 0.052s (Random), 0.097s (CRV), 0.047s (CGM-Fuzz), and 1.264s (StimulusRL DQN). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[6] All four methods achieve 1.000 bug-finding success rate on ALU32; mean steps-to-bug is 8.8 (Random), 8.8 (CRV), 8.6 (CGM-Fuzz), and 71.9 (StimulusRL DQN). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification
[7] For easy-to-trigger combinational bugs such as ALU32, random exploration finds mismatches rapidly while RL may overfit to a coverage-efficient subset of patterns and thus delay bug exposure. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification