ALU32

Concept

ALU32 is a 32-bit combinational arithmetic logic unit included as one of five device-under-test (DUT) designs in the DVSBench benchmark suite used to evaluate the StimulusRL deep-reinforcement-learning stimulus agent for coverage-driven chip design verification. In StimulusRL evaluations, ALU32's combinational nature causes bugs to be triggered almost immediately by nearly any stimulus method, making it a benchmark case where random exploration performs comparably to learned policies.

First seen 6/18/2026

Last seen 6/18/2026

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ALU32

Overview

ALU32 is a 32-bit combinational arithmetic logic unit (ALU) design that appears as one of the five device-under-test (DUT) configurations in the DVSBench benchmark suite. It is used as a verification workload for evaluating stimulus-generation methods, including the deep-reinforcement-learning agent StimulusRL and three baseline generators (Random, CRV, and CGM-Fuzz).

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RELATIONSHIPS

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StimulusRL ← evaluates 100% 2e

StimulusRL is evaluated on the ALU32 DUT in DVSBench.

DVSBench part of → 100% 1e

DVSBench includes ALU32 as one of its five representative DUT benchmarks.

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StimulusRL EVALUATES Extracted graph relationship

DVSBench PART_OF Extracted graph relationship

CITATIONS

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7 citations — click to expand

[1] ALU32 is a 32-bit combinational ALU DUT in the DVSBench benchmark suite with 56 actions, 6-dim observations, 23 coverage bins, and 3 injected bug variants. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[2] ALU32 actions encode one of seven ALU operations combined with eight operand-pattern classes (zero/one, sign extremes, alternating bits, randomized subranges). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[3] Three bug variants are injected into ALU32: SUB implemented as ADD, overflow flag computed incorrectly, and shift-right implemented as shift-left. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[4] All four stimulus-generation methods achieve 1.000 final functional coverage on ALU32, with StimulusRL reporting a slightly lower coverage AUC (0.990) than Random/CRV/CGM-Fuzz (0.995). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[5] Per-2000-step wall-clock runtime on ALU32 is 0.052s (Random), 0.097s (CRV), 0.047s (CGM-Fuzz), and 1.264s (StimulusRL DQN). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[6] All four methods achieve 1.000 bug-finding success rate on ALU32; mean steps-to-bug is 8.8 (Random), 8.8 (CRV), 8.6 (CGM-Fuzz), and 71.9 (StimulusRL DQN). StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification

[7] For easy-to-trigger combinational bugs such as ALU32, random exploration finds mismatches rapidly while RL may overfit to a coverage-efficient subset of patterns and thus delay bug exposure. StimulusRL: A Universal Deep Reinforcement Learning Stimulus Agent for Coverage-Driven Chip Design Verification