A. Aharon, A. Bar-David, B. Dorfman, E. Gofman, M. Leibowitz, V. Shwartzbund “Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator”, In IBM Systems Journal, April 1991

Google Scholar

B. Beizer, “The Pentium Bug, an Industry Watershed”, Testing Techniques Newsletter On-Line Edition, September 1995

Google Scholar

A. Aharon, D. Goodman, M. Levinger, Y Lichtenstein, Y. Malka, C. Metzger, M. Molco, G. Shurek “Test Program Generation for Functional Verification of PowerPC Processors in IBM”, In proceeding of ACM/ IEEE Design Automation Conference 1995

Google Scholar

Y. Lichtenstein, Y. Malka, A. Aharon “Model Based Test Generation for Processor Design Verification”, In Innovative Applications of Artificial Intelligence (IAAI) AAAI Press 1994

Google Scholar

Ahi A. M., Burroughs G.D., Gore A.B., LaMar S.W., Lin C.R., Wieman A.L “Design Verification of the HP9000 Series 7000 pa-risc Workstations”, Hewlett-Packard-Journal num. 8 vol. 14 August 1992

Google Scholar

A. Chandra, V. Iyengar, D. Jameson, R. Jawalker, I. Nair, B. Rosen, M. Mullen, J. Yoor, R. Armoni, D. Geist, Y. Wolfstal “AVPGEN — A Test Case Generator for Architecture Verification”, IEEE Transactions on VLSI Systems 6(6) June 1995

Google Scholar

D. Geist, M. Farkas, A. Landver, Y. Lichtenstein, S. Ur, Y. Wolfsthal “Coverage Directed Generation Using Symbolic Techniques”, FMCAD 96

Google Scholar

E. J. Weyuker, B. Jeng “Analyzing Partition Testing Strategies”, IEEE Transactions on Software Engineering vol. 17 no. 7 July 1991

Google Scholar

E. J. Weyuker, T.J. Ostrand “Theories of Program Testing and the Application of Revealing Subdomains” IEEE Transactions on Software Engineering vol. 6 no 3 May 1980

Google Scholar

Y. Abarbanel, Y. Lichtenstein, Y. Malka, S. Ur “Coverage Driven Processor Bug Classification” Submitted to ACM/IEEE Design Automation Conference 1996

Google Scholar

G. J. Holtzman, “Design and Validation of Computer Protocols”, Prentice Hall, Englewood Cliffs, NJ 1991

Google Scholar

K.L McMillan “Symbolic Model Checking” Kluwer Academic Press, Norwell MA 1993

Google Scholar

K.L McMillan “The SMV System DRAFT”, Carnegie Mellon University, Pittsburgh PA 1992

Google Scholar

A.K. Chandra, V.S. Iyengar, R.V. Jawalekar, M.P. Mullen, I. Nair, B.K. Rosen “Architectural Verification of Processors Using Symbolic Instruction Graphs”, In Proceedings of the International Conference on Computer Design, October 1994

Google Scholar

D. Lewin, L. Fournier, M. Levinger, E. Roytman, G. Shurek “Constraint Satisfaction for Test Program Generation”, IEEE International Phoenix Conference on Communication and Computers, 1995

Google Scholar

A.K. Chandra, V.S. Iyengar “Constraint Solving for Test Case Generation”, In Proceedings of ICCD-92, Cambridge Mass, 1992

Google Scholar

R. C. Ho, C. Han Yang, M. A. Horowitz, D. L. Dill “Architecture Validation for Processors” In ACM ISCA 1995

Google Scholar

H. Iwashita, S. Kowatari, T. Nakata, F. Hirose “Automatic Test Program Generation for Pipelined Processors”, In Proceedings of the International Conference on Computer Aided Design, November 1994

Google Scholar

D. L. Beatty, R. E. Bryant “Formally Verifying a Microprocessor Using a Simulation Methodology”, In Proceedings of the ACM/IEEE Design Automation Conference 1994

Google Scholar

T. A. Diep, J. P. Shen “Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures” In Proceedings of the 25'th Annual International Symposium on Fault Tolerance, June 1995

Google Scholar

H. Iwashita, T. Nakata, F. Hirose “Integrated Design and Test Assistance for Pipeline Controllers”, IEICE Transactions Information Systems (Japan) Vol.E76-D, No. 7, July 1993

Google Scholar

C. May, E. Silha, R. Simpson, H. Warren editors “The PowerPC Architecture”, Morgan Kaufmann, 1994

Google Scholar

S. Weiss, J. E. Smith “POWER and PowerPC”, Morgan Kaufmann, 1994

Google Scholar

D. Lewin, D. Lorenz, S. Ur “A Processor Implementation Verification Methodology”, IBM Unpublished Document

Google Scholar