VCS RACE Solver

Tool

VCS RACE Solver is described in the evidence as the default solver used in a VCS constraint-randomization comparison for x86 opcode generation. In the cited AMD microcode-stimuli study, a multiple-class opcode-generation architecture improved runtime with RACE by 4x, while RACE memory use was described as typically smaller and not the limiting factor compared with BDD-solver memory behavior.

First seen 5/25/2026

Last seen 5/25/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

VCS RACE Solver is identified in the source material as the default RACE solver used in a VCS constraint-solver workflow for generating AMD microcode stimuli and x86 opcodes. The article compares RACE with a BDD solver while evaluating different constrained-random opcode-generation architectures. [C1]

Use in constrained-random opcode generation

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CITATIONS

9 sources

9 citations — click to expand

[1] The source identifies RACE as the default solver used in a VCS constraint-solver comparison for AMD microcode-stimuli and x86 opcode generation. Generating AMD microcode stimuli using VCS constraint solver

[2] A simple constrained-random approach addressed distribution issues but reached speed and memory limits because of the complex x86 instruction set. Generating AMD microcode stimuli using VCS constraint solver

[3] Choosing the opcode category before randomizing simplified the problem by limiting active constraints to those specific to the opcode category. Generating AMD microcode stimuli using VCS constraint solver

[4] In the runtime comparison, the multiple-class architecture was faster with either solver and both opcodes, and the default RACE solver showed a 4x speedup. Generating AMD microcode stimuli using VCS constraint solver

[5] The performance improvement was attributed to fewer variables and constraints; the new implementation had 7x fewer constraints than the original. Generating AMD microcode stimuli using VCS constraint solver

[6] The article measured memory results only for the BDD solver because RACE memory consumption is typically smaller and not a limiting factor. Generating AMD microcode stimuli using VCS constraint solver

[7] The BDD solver elaborates the entire solution space before selecting a solution, which can require large amounts of memory and time, and caches the solution space for later randomization calls. Generating AMD microcode stimuli using VCS constraint solver

[8] The VCS profiling material covers randomize CPU runtime, partition CPU runtime, and memory data, and VCS 2009.12 provided testcase extraction for the slowest partition from each randomize call. Generating AMD microcode stimuli using VCS constraint solver

[9] Randomizing instructions by opcode category improved memory and speed without sacrificing distribution or test-level control. Generating AMD microcode stimuli using VCS constraint solver