Overview

FIRRTL is described by its public repository as the “Flexible Intermediate Representation for RTL.” The chipsalliance/firrtl repository is implemented in Scala and is publicly hosted on GitHub.^[1]

In the provided research evidence, FIRRTL is used as a compiler/intermediate-representation infrastructure for hardware transformation. A Logic Fuzzer paper states that Chiffre leverages the FIRRTL compiler, which allows traversal and transformation over a digital circuit’s intermediate representation using passes.^[2]

Use through Chiffre

In the Logic Fuzzer implementation, the authors wanted cleaner integration than directly modifying RTL. For a proof-of-concept automatic insertion of congestors into the BOOM core, they used Chiffre to automatically instrument Chisel hardware systems. The paper states that Chiffre leverages FIRRTL compiler passes to break an annotated signal and insert a congestor between the broken signal endpoints.^[2]

That experiment was limited to BOOM because the cited Chiffre flow could only work with hardware descriptions written in Chisel.^[3]

Use in MorFuzz coverage instrumentation

MorFuzz uses hardware coverage matrices to evaluate fuzzing inputs and mutations. For comparison with DifuzzRTL, it uses control-register coverage, where a control register is defined as a register whose value is used as the select signal for any multiplexer.^[4]

In that setup, the authors implemented a FIRRTL pass to instrument all control registers. The instrumented circuits count the different states triggered in each module and sum those counts into the final coverage value.^[5]

MorFuzz characterizes control-register coverage as clock-sensitive and as reflecting hardware state better than other coverage matrices. It also cautions that the coverage metric is used only to evaluate inputs and mutations; high coverage in the design under test does not mean the design is bug-free.^[6]

Scope of available evidence

The available evidence supports FIRRTL’s role as an RTL intermediate representation and as pass infrastructure for digital-circuit transformations and instrumentation. It does not provide a complete standalone specification of the FIRRTL language or its full compiler feature set.

^[1]: Public GitHub context for chipsalliance/firrtl. ^[2]: Logic Fuzzer paper, chunk cda12756-0498-4e55-b272-dd805ada2e9e. ^[3]: Logic Fuzzer paper, chunk cda12756-0498-4e55-b272-dd805ada2e9e. ^[4]: MorFuzz paper, chunk 6c34022a-d027-4420-8812-5f4f65ba72f6. ^[5]: MorFuzz paper, chunk 6c34022a-d027-4420-8812-5f4f65ba72f6. ^[6]: MorFuzz paper, chunk 6c34022a-d027-4420-8812-5f4f65ba72f6.