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Caliptra Root of Trust

Tool WIKI v1 · 7/8/2026

Caliptra is an open source IP and firmware project providing an integrated Root of Trust block, hosted under the CHIPS Alliance organization. It is used in state-of-the-art silicon development work by Antmicro, including verification efforts employing Verilator's constrained randomization capabilities.

Caliptra Root of Trust

Caliptra is an open source project that provides IP and firmware for an integrated Root of Trust block. The project is hosted on GitHub under the chipsalliance/Caliptra repository, which is part of the CHIPS Alliance organization.

Project overview

According to the public repository metadata, Caliptra is described as:

"Caliptra IP and firmware for integrated Root of Trust block"

The repository is a collaborative open source effort and reflects ongoing activity in the silicon and hardware security community:

  • Stars: 435
  • Forks: 72
  • Last updated: 2026-07-08

Organizational context

Caliptra is developed as part of the CHIPS Alliance, a collaborative organization focused on open source hardware and chip design. This positions Caliptra alongside other industry-relevant open source silicon initiatives.

Use by Antmicro

Antmicro, a company focused on open source tooling for digital design and verification, uses Caliptra in its state of the art silicon development work. Specifically, Antmicro references Caliptra as one of the industrial projects adopting Verilator's newly introduced constrained randomization functionality for UVM-style verification of silicon designs.

In their August 2024 blog post on Verilator constrained randomization, Antmicro describes the broader context:

"This work has been highly anticipated by many industrial users and is allowing us to slowly but steadily adopt Verilator for UVM-style verification in our state of the art silicon development work like CHIPS Alliance's Caliptra Root of Trust project."

This indicates that Caliptra serves as a real-world industrial use case for advanced open source verification methodologies, including:

  • SystemVerilog constrained randomization
  • UVM testbench support in Verilator
  • Conversion of SystemVerilog constraints to SMT-LIB2 for use with SMT solvers such as z3 and cvc5

Relationships

  • Part of: CHIPS Alliance
  • Used by: Antmicro (in silicon development and verification work)

External references

  • GitHub repository: chipsalliance/Caliptra
  • Antmicro blog on Verilator constrained randomization (referencing Caliptra)

LINKED ENTITIES

2 links
Antmicro USES
chipsalliance PART_OF

CITATIONS

4 sources
4 citations
[1] Caliptra is an open source project providing IP and firmware for an integrated Root of Trust block. chipsalliance/Caliptra
[2] The Caliptra repository is part of the CHIPS Alliance organization. chipsalliance/Caliptra
[3] Antmicro uses Caliptra in its state-of-the-art silicon development work, adopting Verilator's constrained randomization for UVM-style verification. Constrained randomization in Verilator: SystemVerilog constraint to SMT-LIB2 conversion
[4] The Caliptra GitHub repository has 435 stars and 72 forks, and was last updated on 2026-07-08. chipsalliance/Caliptra