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AFL

Tool WIKI v3 · 5/28/2026

AFL is described in the provided evidence as a state-of-the-art coverage-guided fuzzer. It appears as a representative coverage-guided fuzzing tool alongside libFuzzer, and a processor-verification study compared unmodified AFL 2.56b, called Vanilla AFL, with an Enhanced AFL variant using problem-specific mutations.

Overview

AFL is described in the evidence as a coverage-guided fuzzer and as a notable representative of coverage-guided fuzzing alongside LLVM-based libFuzzer. The cited ISS-verification paper characterizes mutation-based fuzzing as a technique that mutates randomly created data and is guided by code coverage, avoiding the need to create an input model. [AFL as coverage-guided fuzzer]

A later cross-level processor-verification study refers to AFL as a state-of-the-art coverage-guided fuzzer and uses the unmodified AFL 2.56b release as its baseline, calling it Vanilla AFL. [AFL 2.56b baseline]

Use in processor-verification research

In Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing, AFL was used in a case study comparing Vanilla AFL with an optimized Enhanced AFL variant. The study configured VexRiscv for the RV32IM instruction subset, used random seeds, started from a 32-bit corpus value of 0x0000, and imposed a 24-hour runtime limit. [AFL in cross-level processor verification]

The same study reported that experiments ran on a Linux machine with an Intel Xeon Gold 5122 CPU at 3.60 GHz, and that results were compared using fuzzer-run metrics such as queue size and unique crashes. In that context, #Queue counted test vectors that increased coverage without causing a co-simulation execution mismatch, while #Unique-Crash counted unique test vectors causing an execution mismatch. [Fuzzer-run metrics]

Enhanced AFL mutations in the evidence

The cross-level verification study enhanced AFL with problem-specific mutations named Fast Exploration and Enhanced Havoc. Fast Exploration is described as a deterministic mutation that adds a preliminary exploration phase before normal mutation. In the RISC-V setting, it begins by inserting each RISC-V instruction at the beginning of every test vector, with instruction arguments fixed to source/destination register x0 and immediate 0; the paper gives addi x0, x0, 0 as an example. [Enhanced AFL mutations]

Execution-controller setting in the AFL-based study

The AFL-based cross-level verification setup used an execution controller with two stated purposes: preventing infinite loops and detecting mismatches between processor cores. Infinite loops were conservatively detected when a new program-counter address equaled an already executed address and register values were unchanged, and the setup also imposed a hard limit of 10,000 ISS instruction executions to handle the halting problem. [Execution controller]

For mismatch detection, the study synchronized and compared when register values changed. In the example described in the paper, the execution controller detected a register-value mismatch between an ISS and an RTL core, threw an error, and stopped the simulation. [Mismatch detection]

Reported comparison of Vanilla AFL and Enhanced AFL

The study compared unmodified AFL 2.56b with Enhanced AFL. It reported that Enhanced AFL generated fewer queue test vectors on average, but a one-tailed Mann–Whitney U test on the #Queue values produced a U-value of 60, z-score of 0, and p-value of 0.5 against a 95% confidence critical threshold of 34. The paper therefore concluded that the apparent improvement was not statistically significant and was negligible in practice. [Vanilla AFL versus Enhanced AFL results]

AFL++ context

The provided public repository context describes AFL++ as “afl with community patches” and lists additions such as a QEMU 5.1 upgrade, collision-free coverage, enhanced laf-intel and redqueen, AFLfast++ power schedules, MOpt mutators, and unicorn_mode. [AFL++ public context]

CITATIONS

9 sources
9 citations
[1] AFL is a representative coverage-guided fuzzer and mutation-based CGF mutates randomly created data guided by code coverage. Verifying Instruction Set Simulators using Coverage-guided Fuzzing
[2] The cross-level processor-verification study used unmodified AFL 2.56b as Vanilla AFL and compared it with Enhanced AFL. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[3] The study configured VexRiscv for RV32IM, used random seeds, used a 32-bit corpus value of 0x0000, and set a 24-hour runtime limit. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[4] The study defined #Queue as coverage-increasing non-mismatch test vectors and #Unique-Crash as unique mismatch-causing test vectors. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[5] Enhanced AFL used problem-specific mutations named Fast Exploration and Enhanced Havoc; Fast Exploration inserts each RISC-V instruction at the beginning of test vectors with x0 and immediate 0 arguments. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[6] The execution controller prevents infinite loops, detects processor-core mismatches, and applies a hard limit of 10,000 ISS instruction executions. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[7] The execution controller synchronizes comparisons on register-value changes and can stop simulation after detecting an ISS/RTL mismatch. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[8] Enhanced AFL generated fewer queue test vectors on average, but the Mann–Whitney U result for #Queue was not statistically significant at the stated 95% threshold. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[9] AFL++ is described as afl with community patches and additional features including QEMU 5.1 upgrade, collision-free coverage, enhanced laf-intel and redqueen, AFLfast++ power schedules, MOpt mutators, and unicorn_mode. AFLplusplus/AFLplusplus

VERSION HISTORY

v3 · 5/28/2026 · gpt-5.5 (current)
v2 · 5/28/2026 · gpt-5.5
v1 · 5/25/2026 · gpt-5.5