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Yakoub Nemouchi

Person WIKI v1 · 5/25/2026

Yakoub Nemouchi is listed as a co-author of the 2013 paper "Test Program Generation for a Microprocessor: A Case-Study" and is affiliated in that publication with Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, France, with CNRS also listed for the same author group.

Overview

Yakoub Nemouchi is a researcher named as a co-author of the paper "Test Program Generation for a Microprocessor: A Case-Study" together with Achim D. Brucker, Abderrahmane Feliachi, and Burkhart Wolff. [C1]

Affiliation

In the paper author block, Nemouchi is associated with Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, F-91405, France; the same affiliation block also lists CNRS, Orsay, F-91405, France and gives the contact pattern {feliachi, nemouchi, wolff}@lri.fr. [C2]

Research contribution represented in the evidence

The cited publication presents a case study on generating test programs from a formal microprocessor model. The generated programs are intended to validate whether a microprocessor correctly implements a specified instruction set. [C3]

The work is described as using an existing Isabelle/HOL model and HOL-TestGen, a model-based testing environment extending Isabelle/HOL. The paper reports several conformance test scenarios in which processor models were used to synthesize test programs run against real hardware in the loop. [C4]

Publication context

The paper appears in the TAP 2013 proceedings edited by M. Veanes and L. Viganò, in LNCS volume 7942, pages 76–95, and is identified as a 2013 Springer-Verlag publication in the provided source. [C5]

CITATIONS

5 sources
5 citations
[1] C1: Yakoub Nemouchi is listed as a co-author of "Test Program Generation for a Microprocessor: A Case-Study" with Achim D. Brucker, Abderrahmane Feliachi, and Burkhart Wolff. Test Program Generation for a Microprocessor: A Case Study
[2] C2: The publication associates Nemouchi with Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, France, and lists CNRS in the same affiliation block. Test Program Generation for a Microprocessor: A Case Study
[3] C3: The paper presents a case study using a formal microprocessor model to generate test programs that validate correct implementation of a specified instruction set. Test Program Generation for a Microprocessor: A Case Study
[4] C4: The paper uses an Isabelle/HOL model and HOL-TestGen, and reports conformance test scenarios with synthesized test programs run against real hardware in the loop. Test Program Generation for a Microprocessor: A Case Study
[5] C5: The publication context is TAP 2013, LNCS 7942, pages 76–95, 2013, with Springer-Verlag indicated in the source. Test Program Generation for a Microprocessor: A Case Study