Overview

Sadullah Canakci is listed as an author affiliated with the Department of ECE at Boston University in the paper ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance. The paper's author list includes Canakci alongside Chathura Rajapaksha, Leila Delshadtehrani, Anoop Nataraja, Michael Bedford Taylor, Manuel Egele, and Ajay Joshi.

Research context

In ProcessorFuzz, Canakci and co-authors present a processor fuzzer for RTL verification that uses a CSR-transition coverage metric. The approach monitors transitions in Control and Status Registers (CSRs), which the paper describes as controlling and holding processor state; the authors argue that CSR transitions indicate new processor states and can therefore guide fuzzing toward unexplored processor behavior.

The paper evaluates ProcessorFuzz on three real-world open-source RISC-V processors: Rocket, BOOM, and BlackParrot. In the reported evaluation, ProcessorFuzz triggered ground-truth bugs 1.23× faster on average than DIFUZZRTL, exposed eight new bugs across the three RISC-V cores, and found one new bug in a reference model. The paper states that all nine bugs were confirmed by the corresponding project developers.