Jerry Burch

Person

The supplied materials contain two contexts for the name Jerry Burch: a public biographical context identifying Gerald Thomas Burch as a former American football tight end, and technical evidence referring to Burch and Dill's 1994 approach to formal verification of pipelined microprocessors. The technical evidence centers on Burch-Dill verification, correspondence checking, abstraction by pipeline flushing, and later implementation in a UCLID5 case study for Y86-64 processors.

First seen 5/26/2026

Last seen 5/26/2026

Evidence 3 chunks

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Overview

The provided materials use the name Jerry Burch in two contexts. The public context identifies Gerald Thomas Burch as an American former professional football player, a tight end for the Oakland Raiders of the American Football League, who played college football for the Georgia Tech Yellow Jackets.[1]

The technical evidence, by contrast, discusses Burch-Dill verification, a 1994 approach attributed to Burch and Dill for formal verification of pipelined microprocessors.[2] The supplied technical evidence does not provide biographical details connecting the football player to the Burch-Dill work, so the two contexts should not be conflated on the basis of the provided sources.

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CITATIONS

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[1] Public context identifies Gerald Thomas Burch as a former American football tight end for the Oakland Raiders who played college football for Georgia Tech. Jerry Burch

[2] The technical evidence attributes key 1994 microprocessor verification ideas to Burch and Dill and describes the abstraction-function approach. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[3] The verification problem is to prove that pipelined execution faithfully implements the sequential ISA semantics for all possible instruction sequences. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[4] The 2018 report uses UCLID5 to verify Y86-64 pipelined microprocessors and reports success in showing equivalence with the sequential reference model for all possible programs. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[5] In the UCLID5 implementation, the abstraction function is computed by flushing a general pipeline state and transferring the architectural state to the sequential model. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[6] The correspondence condition compares PIPE-after-abstraction with either one SEQ step from the abstracted state or the abstracted initial state, allowing for cycles with no architectural progress. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[7] Burch and Dill demonstrated data abstraction and term-level modeling for automated microprocessor verification, including symbolic terms and uninterpreted functions for units such as decoders and ALUs. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5

[8] Burch-Dill verification proves a safety property and requires additional liveness verification because zero-progress cycles, deadlock, or a do-nothing device can satisfy the safety check. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5