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Zhejiang University

Organization WIKI v1 · 5/27/2026

Zhejiang University is represented in the provided evidence as an author affiliation for security and hardware-verification research on MorFuzz, a processor fuzzing system published in the Proceedings of the 32nd USENIX Security Symposium.

Zhejiang University

Evidence-supported research presence

Zhejiang University appears in the provided evidence as the affiliation of four coauthors of the paper “MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation.” The Zhejiang University-affiliated authors listed in the paper are Jinyan Xu, Yiyuan Liu, Haoran Lin, and Yajin Zhou. The same author block lists Sirui He and Cong Wang as affiliated with City University of Hong Kong. The paper is included in the Proceedings of the 32nd USENIX Security Symposium, held August 9–11, 2023 in Anaheim, California, USA.

Technical context: MorFuzz paper

The MorFuzz paper addresses processor verification, noting that modern processors are complex and that hardware bugs can cause severe outcomes such as unpredictable behavior, machine lockups, software security corruption, or privilege-escalation vulnerabilities. The paper frames processor verification as difficult because existing hardware fuzzing techniques face challenges including complex input grammar, deceptive mutation guidance, and model implementation differences.

MorFuzz is presented as a processor fuzzer intended to efficiently discover software-triggerable hardware bugs. Its core idea is to use runtime information to generate instruction streams with valid formats and meaningful semantics. The system introduces a new input structure for multi-level runtime mutation primitives and an instruction morphing technique for dynamically mutating instructions. The paper also describes extensions to a co-simulation framework for multiple microarchitectures and a state-synchronization technique intended to eliminate implementation differences.

Evaluation reported in the evidence

The paper reports evaluating MorFuzz on three open-source RISC-V processors: CVA6, Rocket, and BOOM. In that evaluation, MorFuzz reportedly discovered 17 new bugs, with 13 CVEs assigned.

Related Zhejiang University-affiliated people in the evidence

  • Jinyan Xu — listed as affiliated with Zhejiang University in the MorFuzz paper.
  • Yiyuan Liu — listed as affiliated with Zhejiang University in the MorFuzz paper.
  • Haoran Lin — listed as affiliated with Zhejiang University in the MorFuzz paper.
  • Yajin Zhou — listed as affiliated with Zhejiang University in the MorFuzz paper.

CITATIONS

5 sources
5 citations
[1] Zhejiang University affiliation of Jinyan Xu, Yiyuan Liu, Haoran Lin, and Yajin Zhou MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
[2] MorFuzz paper appeared in the Proceedings of the 32nd USENIX Security Symposium held August 9–11, 2023 in Anaheim, CA MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
[3] MorFuzz is described as a processor fuzzer for discovering software-triggerable hardware bugs using runtime information to generate valid and meaningful instruction streams MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
[4] MorFuzz introduces a new input structure, runtime mutation primitives, instruction morphing, co-simulation extensions, and state synchronization MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
[5] MorFuzz was evaluated on CVA6, Rocket, and BOOM and discovered 17 new bugs with 13 CVEs assigned MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation