IBM Research Laboratory Haifa
Overview
IBM Research Laboratory Haifa appears in the provided evidence under closely related names, including IBM Research Lab, Haifa and IBM Research Laboratory in Haifa. The 2004 article Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification lists Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, and Avi Ziv with the affiliation IBM Research Lab, Haifa.[IBM Research Lab Haifa affiliation] The same article gives a contact address for Michael Vinov at IBM Research Laboratory, Haifa University Campus, Haifa 31905, Israel.[Haifa University Campus contact address]
Technical focus represented in the evidence
The evidence connects IBM Research Laboratory Haifa with research and engineering work in functional processor verification, test program generation, functional coverage, constraint-based modeling, and simulation-based verification. The Genesys-Pro article is categorized under functional verification and testbench generation and addresses test program generation for functional processor verification.[IBM Research Lab Haifa affiliation]
The article describes functional verification as a bottleneck in the hardware design cycle and states that simulation-based techniques play a major role in industrial microprocessor verification.[Functional verification context] In that setting, the article discusses random and model-based test program generation for processor and multiprocessor verification, including IBM's earlier Genesys tool and its successor Genesys-Pro.[Model-based TPG and Genesys]
Genesys-Pro and processor verification
According to the article, IBM's earlier random test-program generation methodology tightly coupled architectural information with the test program generation tool. Model-based test program generation instead separates the generator into a generic, architecture-independent engine and a model describing the target architecture.[Model-based TPG and Genesys]
The article states that IBM developed Genesys, described as the first model-based pseudorandom test program generator, in 1991, and that Genesys was widely used both inside and outside IBM during the following decade.[Model-based TPG and Genesys] The article presents Genesys-Pro as a second-generation model-based test program generation tool with improvements over Genesys, including greater expressive power in the test-template language and more constraint-solving processing power.[Genesys-Pro improvements]
At the time of publication, the article reported that Genesys-Pro was the main test generation tool for functional verification of IBM processors, including several complex processors. It further stated that generated tests were higher in quality, different types of knowledge were easier to maintain, complex verification plans could be fully covered, and escape bugs were very few or absent.[Genesys-Pro IBM processor verification]
Researchers and areas represented
The author biographies in the article identify several IBM Research Laboratory Haifa research staff members and their research interests:
- Allon Adir: test program generation, multiprocessor verification, languages for shared memory, and distributed programming.[Allon Adir profile]
- Eli Almog: test program generation, processor verification, and scheduling algorithms.[Eli Almog profile]
- Laurent Fournier: test program generation, verification methodology, and functional coverage.[Laurent Fournier profile]
- Eitan Marcus: test program generation, functional coverage, and constraint-based modeling languages; the biography places him in the Verification Technologies Department at the IBM Research Laboratory in Haifa.[Eitan Marcus profile]
- Michal Rimon: knowledge-based systems, test program generation, planning, and constraint satisfaction.[Michal Rimon profile]
- Michael Vinov: computer architectures, test program generation, functional verification, and parallel computing.[Michael Vinov profile]
- Avi Ziv: simulation-based verification, functional coverage, coverage-directed test generation, and high-level modeling for hardware systems; the biography places him in the Verification Technologies Department at the IBM Research Laboratory in Haifa.[Avi Ziv profile]
Together, these biographies show that the laboratory work represented in the evidence centered on processor and hardware verification technologies, especially test program generation and coverage-oriented verification methods.