DARPA

The evidence expands DARPA as the Defense Advanced Research Projects Agency. In the cited TestRIG paper, DARPA is identified in the acknowledgements as the sponsor of the reported work under contract HR0011-18-C-0016 (“ECATS”), and the work is described as part of the DARPA SSITH research program.[DARPA sponsorship of ECATS/SSITH]

Supported research context

The sponsored work concerns TestRIG, an open-source repository collecting TestRIG-compatible implementations and verification engines for RISC-V CPU testing. The paper states that TestRIG accelerates development by providing a tighter debugging loop and is expected to contribute toward a standardized RISC-V testing framework based on instrumentation of open implementations.[TestRIG repository and RISC-V verification context]

The same source discusses future TestRIG work, including richer QCVEngine generators for virtual memory, cache testing, and floating-point operations, as well as support for memory-model concurrency testing using RVFI-DII instruction streams with specified timestamps across shared-memory cores.[Future TestRIG verification work]

Publication and disclaimer

The paper states that it was approved for public release with unlimited distribution. It also includes a disclaimer that the authors’ views, opinions, and findings should not be interpreted as official views or policies of the Department of Defense or the U.S. Government.[Public release and official-views disclaimer]