Overview

Boston University is represented in the provided evidence in computer engineering research related to processor verification and RISC-V processor design. In the ProcessorFuzz paper, Sadullah Canakci, Chathura Rajapaksha, Leila Delshadtehrani, Manuel Egele, and Ajay Joshi are listed with the affiliation Department of ECE, Boston University and Boston University email addresses.

Processor verification research

The paper ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance presents ProcessorFuzz, a processor fuzzer for Register-Transfer Level (RTL) verification. ProcessorFuzz uses a CSR-transition coverage metric: it monitors transitions in Control and Status Registers because CSRs control and hold processor state, so CSR transitions are treated as indicators of new processor states for fuzzing exploration.

The paper evaluates ProcessorFuzz on three open-source RISC-V processors: Rocket, BOOM, and BlackParrot. It reports that ProcessorFuzz triggered a set of ground-truth bugs 1.23× faster on average than DIFUZZRTL, exposed eight new bugs across the three RISC-V cores, and found one new bug in a reference model. The paper states that all nine bugs were confirmed by the developers of the corresponding projects.

RISC-V processor work

Boston University is also named in the evidence as a participant in BlackParrot, described as joint work of the University of Washington and Boston University. The cited processor-verification paper describes BlackParrot as a SystemVerilog, single-issue, in-order core implementing the 64-bit RISC-V instruction set. It also states that BlackParrot can boot Linux and that a four-core configuration was taped out in 12 nm technology.