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UVM agent

Concept WIKI v1 · 5/27/2026

A UVM agent is a reusable verification component used to connect a virtual sequence to a specific DUT interface or sub-interface. In the cited VPU verification environment, each agent contained a sequencer, driver, and monitor connected to a virtual interface; the driver applied transactions to the DUT sub-interface, while the monitor observed interface state and returned transactions for sequencing and checking.

Overview

A UVM agent is a component used inside a Universal Verification Methodology verification environment to encapsulate stimulus generation and observation for a specific DUT interface or sub-interface. In the referenced VPU verification environment, the design exposed several semi-independent sub-interfaces, so the verification team created one agent for each specific sub-interface. [UVM agent per sub-interface]

Structure

In the described setup, an agent for a sub-interface contains three standard elements:

  • a sequencer,
  • a driver, and
  • a monitor connected to the virtual interface. [UVM agent composition]

For example, the issue sub-interface had an agent with this sequencer-driver-monitor structure. [Issue agent structure]

Operation

Virtual sequences create interface-specific transactions and send them to the corresponding interface agent. When the agent driver receives a transaction, it stimulates the associated DUT sub-interface using the transaction values. [Driver behavior]

Because the virtual sequence does not know exactly when the transaction is driven, a specific monitor captures the interface state and sends it back to the virtual sequence through the sequencer. The virtual sequence can then react to the returned transaction and produce new stimulus. [Monitor feedback behavior]

Use in a VPU verification flow

In the cited VPU verification methodology, instruction randomization was concentrated at the issue sub-interface, while other sub-interfaces reacted according to the driven instructions. Once an instruction was fed using the issue agent, the UVM environment followed the VPU instruction execution flow through the DISPATCH and COMPLETED interfaces. [Issue-agent-driven flow]

At the COMPLETED interface, a monitor observed a completion flag and created a transaction when instruction execution completed. [Completed monitor transaction]

Relationship to scoreboarding

The same UVM setup initially enabled simple instruction execution to check that the design was not stalling. To assert result correctness, the environment added a scoreboard connected to the completed monitor; when an instruction finished, the scoreboard compared results. [Scoreboard connection]

LINKED ENTITIES

2 links
Functional Verification of a RISC-V Vector Accelerator USES
UVM testbench PART_OF

CITATIONS

8 sources
8 citations
[1] UVM agent per sub-interface Functional Verification of a RISC-V Vector Accelerator
[2] UVM agent composition Functional Verification of a RISC-V Vector Accelerator
[3] Issue agent structure Functional Verification of a RISC-V Vector Accelerator
[4] Driver behavior Functional Verification of a RISC-V Vector Accelerator
[5] Monitor feedback behavior Functional Verification of a RISC-V Vector Accelerator
[6] Issue-agent-driven flow Functional Verification of a RISC-V Vector Accelerator
[7] Completed monitor transaction Functional Verification of a RISC-V Vector Accelerator
[8] Scoreboard connection Functional Verification of a RISC-V Vector Accelerator