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RISC-V instruction generation

Concept WIKI v1 · 5/26/2026

RISC-V instruction generation is evidenced here by TatsuProject/rvgen, a GitHub repository described as a pure-Python RISC-V instruction generator with built-in functional coverage, auto-regression, and CI-ready dashboards.

Overview

The provided evidence documents RISC-V instruction generation through the GitHub repository TatsuProject/rvgen. The repository is described as a "Pure-Python RISC-V instruction generator" and is associated with built-in functional coverage, auto-regression, and CI-ready dashboards.

Evidenced implementation characteristics

Based on the repository metadata, the evidenced implementation has the following characteristics:

  • Implementation language: The generator is described as Pure-Python.
  • Target ISA family: It is specifically described as a RISC-V instruction generator.
  • Coverage support: It includes built-in functional coverage.
  • Regression support: It includes auto-regression capability.
  • Continuous-integration reporting: It includes CI-ready dashboards.

Tooling role

Within the available evidence, rvgen serves as the concrete example of tooling for RISC-V instruction generation. Its description combines instruction generation with verification-oriented support features such as functional coverage, regression automation, and dashboards suitable for CI workflows.

CITATIONS

4 sources
4 citations
[1] TatsuProject/rvgen is described as a pure-Python RISC-V instruction generator. TatsuProject/rvgen
[2] TatsuProject/rvgen is described as having built-in functional coverage. TatsuProject/rvgen
[3] TatsuProject/rvgen is described as having auto-regression support. TatsuProject/rvgen
[4] TatsuProject/rvgen is described as having CI-ready dashboards. TatsuProject/rvgen