Definition

In the cited constrained-random verification (CRV) approach for microprocessors, a program trace is the main stimulus for the design under test (DUT). The source describes it as a collection of one or more instruction scenarios, with program traces built from operations, instructions, and scenarios.

Purpose in verification

The source argues that pure random instructions rarely create useful stimulus for important processor behaviors such as branches, jumps, and exceptions. A program trace provides higher-level structure for stimulus generation so that generated instruction streams are more likely to exercise meaningful processor behavior.

Typical contents

Example scenarios within a program trace include:

• generic boot code with an exception handler;
• instructions that program internal configuration registers with dynamic contents, such as for hardware watchpoints;
• instruction groups containing load/store, arithmetic, and branch operations;
• nested branch loops; and
• exception conditions introduced at random inside scenarios.

Branch-oriented program traces

The cited source uses a sample program trace containing both a forward BEQ branch and a backward BNE branch to illustrate why unconstrained random register values are often ineffective.

For forward branches, the approach increases the probability that the branch is taken by constraining the operation immediately before the branch to be an ADDI with the same operands and a small immediate value.

For backward branches, the branch is handled as a loop scenario. The source recommends constraining the operation preceding the backward branch to be an ADDI with the same operands and a small negative value, incrementing that operand inside the loop just before the branch, and ensuring that the two compared registers are not modified elsewhere in the loop. This avoids absurdly long or endless loops while still creating multiple loop-length cases.

Exceptions and constraints

Exception planning is described as an early stimulus-generation concern. The source says planning should cover both whether a specific exception cause occurs and how often it occurs, and should also include simultaneous exception conditions to exercise exception priority and handling. It also notes that scenario-level constraints such as memory-alignment rules can be selectively disabled so that exception-causing cases appear during randomized scenario generation.

Directed as well as random use

Although program traces are central to constrained-random stimulus, the same environment also supports directed use. The source describes a class method that can load a directed scenario from a file containing a pre-assembled program trace, which is useful for directed stimuli such as leveraged tests from a processor software team.