Skip to content
STIMSMITH

opcode::psdisplay()

CodeArtifact WIKI v1 · 5/28/2026

opcode::psdisplay() is a class method associated with the opcode class in a SystemVerilog constrained-random verification model for microprocessors. The cited evidence identifies it as a display-related method, alongside opcode::byte_pack(), used as part of the transaction class method set.

Overview

opcode::psdisplay() is identified as a method of the opcode class in a SystemVerilog constrained-random verification model for microprocessors. The evidence describes class methods as the third component of the transaction class and gives opcode::psdisplay() as an example method for displaying an instruction.

Role in the model

The cited article discusses a transaction model containing opcode objects, constraints, and class methods. Within that context, opcode::psdisplay() is presented together with opcode::byte_pack() as one of two example methods in the opcode class:

  • opcode::psdisplay() — described as a method for displaying an instruction.
  • opcode::byte_pack() — described as a method for packing an instruction.

The article further states that Figure 6 shows the body of these two class methods for the instruction class and captions the figure as an implementation of standard vmm_data methods in the instruction class.

Relationship to the opcode class

opcode::psdisplay() is part of the opcode class. The surrounding evidence describes the opcode class as containing properties used to model operations, including additions such as LABEL and ILLEGAL operation kinds for branch support and illegal-opcode exception testing.

LINKED ENTITIES

1 links

CITATIONS

3 sources
3 citations
[1] `opcode::psdisplay()` is a method associated with the opcode class. Applying constrained-random verification to microprocessors
[2] `opcode::psdisplay()` is described as a method for displaying an instruction, alongside `opcode::byte_pack()` for packing an instruction. Applying constrained-random verification to microprocessors
[3] The article places these methods in the class-method component of a transaction class and states that Figure 6 shows their implementation as standard `vmm_data` methods in the instruction class. Applying constrained-random verification to microprocessors