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Loop Scenario (Backward Branch)

Concept

A constrained-random verification technique used in processor testbenches to handle backward branches by treating them as bounded loop scenarios. By structuring an ADDI (add immediate) operation immediately before the branch and incrementing a loop-index register inside the loop body, the scenario avoids endless execution while still exercising the branch condition evaluation logic across a controllable range of loop iterations.

First seen 6/5/2026
Last seen 6/5/2026
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Overview

In constrained-random verification (CRV) of microprocessors, automatic instruction generation must deal with the fact that purely random register values almost never satisfy the comparison operands of a backward branch. For example, a BNE R3, R4 instruction with random contents in R3 and R4 will almost never fall through, so program execution becomes stuck in a loop for a very large (effectively unbounded) number of iterations. The Loop Scenario (Backward Branch) technique addresses this by deliberately constructing the instructions around the branch so that the loop terminates after a small, controllable number of iterations.

Problem With Pure Random Backward Branches

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CITATIONS

6 sources
6 citations — click to expand
[1] Purely random 32-bit register values are extremely unlikely to make the operands of a backward BNE branch equal, so program execution would be stuck in a backward-branch loop for a very long time. Applying Constrained-Random Verification to Microprocessors
[2] Backward branches should be handled as loop scenarios, with the operation preceding a backward branch constrained to be an ADDI with the same operands and a small negative immediate value, the operand (loop index) incremented by 1 inside the loop just before the branch, and the two branch-operand registers prohibited from being modified elsewhere inside the loop. Applying Constrained-Random Verification to Microprocessors
[3] In the Figure 10 worked example, an immediate of -1 at line 7 makes R3 equal R4 at the line-12 comparison so the BNE falls through immediately, while an immediate less than -1 causes the line-11 ADDI to bring R3 and R4 closer by 1 per iteration until they are equal and the loop exits. Applying Constrained-Random Verification to Microprocessors
[4] Boundary conditions must be considered, e.g., a BGT R1, R2, LABEL_X is always taken if R2 holds the smallest possible number, which would re-create an unbounded loop. Applying Constrained-Random Verification to Microprocessors
[5] Forward branches are addressed symmetrically by requiring the preceding operation to be an ADDI with the same operands and a small immediate value (positive, negative, or zero), so that the probability of a forward branch being taken becomes reasonable. Applying Constrained-Random Verification to Microprocessors
[6] Three types of scenarios are typically supported — constrained-random, directed-random (e.g., preloading memory with walking patterns and boundary values), and directed (loading a pre-assembled program trace) — and a scenario generator randomly selects and randomizes among them until a user-specified stopping condition. Applying Constrained-Random Verification to Microprocessors