is_branch predicate

CodeArtifact

The `is_branch` predicate is used in a model-based test specification to restrict generated VAMP microprocessor tests to branching/control-flow instructions. In the cited case study, it appears in both single-instruction and instruction-sequence test specifications for comparing a system under test against the reference instruction semantics.

First seen 5/26/2026

Last seen 5/26/2026

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Overview

is_branch is a predicate used in the VAMP microprocessor test-generation case study to classify instructions for control-flow-related testing. It appears in test specifications that generate tests for branching operations, filtering either a single instruction or a list of instructions to the branch-instruction subset.

Use in single-instruction branch tests

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test purpose ← uses 90% 1e

is_branch is used as a test purpose to constrain test generation to branch operations.

CITATIONS

7 sources

7 citations — click to expand

[1] `is_branch` is used in a test specification for branching/control-flow operations. Test Program Generation for a Microprocessor: A Case Study

[2] The single-instruction branch specification compares `SUT σ0 i` with `exec_instr σ0 i` when `test_spec is_branch i` holds. Test Program Generation for a Microprocessor: A Case Study

[3] Generated unit tests for branching operations start from initial state `σ0`, and one schematic example uses `Ijalr`. Test Program Generation for a Microprocessor: A Case Study

[4] The fixed initial-state scenario is limited because branching-operation behavior depends on flag values. Test Program Generation for a Microprocessor: A Case Study

[5] `list_all is_branch` is used to constrain instruction-list test specifications for branch instruction sequences. Test Program Generation for a Microprocessor: A Case Study

[6] A concrete generated branch sequence is `[Ij 1, Ijalr 0]`, corresponding to assembly instructions `IJ 1` and `IJALR 0`. Test Program Generation for a Microprocessor: A Case Study

[7] The case study performs test-data generation by constraint solving and random instantiation, and suggests additional constraints to reduce the uniformity domain and improve coverage. Test Program Generation for a Microprocessor: A Case Study