**Information leakage** is a security condition in which implementation behavior reveals information that should remain hidden. In the processor-security context, leakage is commonly studied through **side channels**: observable effects of microarchitectural behavior that can expose protected information even when functional program outputs appear correct. Recent work frames such guarantees using **hardware-software leakage contracts**, which formally specify what information a modern processor is allowed to expose through side-channel-relevant behavior.[^1]

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