Functional Reference Model

A Functional Reference Model is a software model used in verification to predict the expected state of design resources after generated hardware transactions. In the described verification flow, it is part of a generic test-generation engine that produces tests from an architecture model, expert knowledge, and a test template.^[1]

Role in Test Generation

During test generation, the generator emits a sequence of hardware transactions that are later executed on a design simulator.^[1] For each generated transaction, the functional reference model calculates the resulting values of relevant resources.^[1] These calculated values serve two purposes:

1. Guiding subsequent generation — later transactions may depend on resource values produced by earlier transactions.^[1]
2. Checking simulator correctness — the reference-model results are compared with the actual results produced by the design simulator.^[1]

A mismatch between the values predicted by the functional reference model and the values produced by the simulator indicates a potential bug in the design.^[1]

Use in Processor Verification

The evidence describes the special case of processor verification, where each hardware transaction is a single processor instruction.^[1] In this context, a test template may partially specify a scenario, while unspecified values are chosen randomly during generation.^[1] The generated test includes:

• initialization of relevant registers and memory sections;
• a list of instructions to be executed by the simulator;
• expected results for all resources, as calculated by the application’s reference model.^[1]

Thus, the functional reference model acts as the oracle for the expected architectural state after execution.

Integration with the Knowledge Base

The broader verification application includes a knowledge base describing the design, its behavior, and expert knowledge.^[1] For processor instructions, the design description may include an assembly opcode and a list of operands, where each operand has attributes describing its properties and allowed values.^[1] The functional reference model uses such design-behavior information to compute expected resource values after each generated instruction or transaction.

Implementation Context

The described verification application is implemented in C++, with graphical interfaces using the QT library.^[1] The functional reference model is used by the generator as part of the generation process, alongside the architecture model, expert knowledge, and test template.^[1]

Summary

In this verification architecture, the functional reference model is the mechanism that predicts correct design behavior during generated tests. It maintains expected resource values across transactions and provides the baseline against which simulator output is compared. Its correctness is therefore central to identifying design bugs during simulation-based verification.

^[1]: Evidence ^[2].