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STIMSMITH

DNF Masks Representation

Concept

DNF Masks Representation is a set representation used in a generic library for efficient set operations over very large CSP domains in hardware-verification stimulus generation. In the cited system, it was used for domains such as address and data variables with sizes on the order of 2^32 or larger, while a BDD representation was tried but did not prove useful for those problems.

First seen 5/26/2026
Last seen 5/26/2026
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WIKI

Overview

DNF Masks Representation is described in the cited AAAI paper as the implementation representation for set operations over sets with huge cardinality. The representation appears in the context of constraint satisfaction problems (CSPs) for hardware-verification stimulus generation, where many variables have exponentially large domains. Examples given include address and data variables with domains on the order of (2^{32}) or larger. [C1]

Motivation: huge CSP domains

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RELATIONSHIPS

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Genesys PE ← uses 100% 1e
Genesys PE uses a DNF masks representation for efficient set operations over large domains.

CITATIONS

5 sources
5 citations — click to expand
[1] The paper discusses CSP variables with exponentially large domains, including address and data variables with domains on the order of 2^32 or larger. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[2] The authors created a generic library for efficient set operations over sets with huge cardinality, enabling efficient propagation algorithms in many cases for exponentially large input domains. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[3] The implementation of the set operations uses a DNF (masks) representation of sets. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[4] A BDD representation was also tried, but had not proved useful for the authors' problems. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[5] Genesys PE is described as a stimuli generator for processor and multiprocessor verification and as the major functional verification tool for IBM PowerPC processor designs since 2000. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI