Directed Test Suites
ConceptDirected test suites are described in the provided evidence as a baseline RISC-V verification technique: semi hand-written tests that cover different RISC-V instruction sets.
First seen 5/26/2026
Last seen 5/26/2026
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Overview
In the provided evidence, directed test suites are discussed in the context of RISC-V processor verification. They are characterized as a baseline approach consisting of semi hand-written directed test suites that cover different RISC-V instruction sets. [C1]
Role in RISC-V verification
NEIGHBORHOOD
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1 connectionsThe paper mentions semi hand-written directed test suites as baseline verification approaches for RISC-V.
CITATIONS
2 sources2 citations — click to collapse
[1] Directed test suites are a baseline RISC-V verification approach consisting of semi hand-written tests that cover different RISC-V instruction sets. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
[2] The evidence contrasts directed test suites with other RISC-V verification approaches, including randomized-pattern generation, constraint-based specifications, coverage-guided fuzzing, cross-level co-simulation, and formal model-checking techniques. Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing