Constraints (SystemVerilog Verification)
ConceptIn SystemVerilog, a constraint is a Boolean expression that describes a property of a class field, used to direct the random generator toward legal, specification-compliant values. Constraints are the central mechanism of pseudo-random stimulus generation and the directed-random verification methodology.
First seen 6/9/2026
Last seen 6/9/2026
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Constraints (SystemVerilog Verification)
Definition
In SystemVerilog, a constraint is a Boolean expression that describes a property of one or more class fields. Constraints are declared as class members, just like fields and methods, using the constraint keyword. They can be written in the original class definition or in a derived (subclass) definition.
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3 connectionsDirected-Random Verification uses constraints to control the degree of randomness in generated stimulus.
Pseudo-Random Stimulus Generation uses constraints to control the random value generation process.
CAN_Message class uses constraints to restrict the random generation of message fields.
CITATIONS
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[1] A constraint is a Boolean expression describing a property of a field that directs the random generator; solving the constraints is performed by a solver, which may be embedded in a simulator or in a separate testbench generator. Testbench Automation and Constraints Tutorial - Doulos
[2] Constraints are class members declared with the `constraint` keyword and can be defined in the original class or in derived classes. Testbench Automation and Constraints Tutorial - Doulos
[3] The CANbus DLC field can be constrained to `[0:8]` using `inside {[0:8]}` or `DLC <= 8`, and the dynamic array size can be tied to DLC via `message.data.size() == message.DLC`. Testbench Automation and Constraints Tutorial - Doulos
[4] If constraints conflict, the random generator will fail to find a solution. Testbench Automation and Constraints Tutorial - Doulos
[5] A subclass can override a parent class's constraint; e.g., `class CAN_message_4 extends CAN_Message; constraint c1 { message.DLC == 4; } endclass`. Testbench Automation and Constraints Tutorial - Doulos
[6] The `randomize() with { ... }` construct applies additional or overriding inline constraints to a single call, equivalent to declaring a named constraint on the class. Testbench Automation and Constraints Tutorial - Doulos
[7] Directed-random verification controls how random stimulus values are via constraints, balancing coverage of corner cases against the cost of exhaustive enumeration. Testbench Automation and Constraints Tutorial - Doulos
[8] In adversarial machine learning, domain constraints are feature relationships an adversary must satisfy for an attack to be realized; up to 82% of adversarial examples from state-of-the-art crafters violate such constraints, and enforcing them can improve model accuracy by up to 34%. On the Robustness of Domain Constraints
[9] Cardinality constraints on sets generalize typestate properties (subset/disjointness relations between object states); satisfiability complexity ranges from polynomial time to NP-hard depending on the fragment. On Algorithms and Complexity for Sets with Cardinality Constraints