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Barcelona Supercomputing Center

Concept WIKI v1 · 6/18/2026

The Barcelona Supercomputing Center (BSC-CNS) is a research center active in high-performance computing, atmospheric modeling, and processor design/verification. Its documented activities include the MONARCH chemical weather prediction system with the CAMP chemistry solver, the Makinote FPGA-based emulation cluster for pre-silicon emulation of RISC-V designs, and multicore RISC-V verification under the Barcelona Zettascale Lab (BZL) project.

Overview

The Barcelona Supercomputing Center (BSC-CNS) is a research institution whose published work spans atmospheric chemistry modeling, FPGA-based hardware emulation, and functional verification of RISC-V multicore systems. Its outputs include software packages, hardware platforms, and verification methodologies that have been evaluated against published benchmarks.

Atmospheric Chemistry Modeling

BSC develops the Multiscale Online Nonhydrostatic AtmospheRe CHemistry (MONARCH) model, a chemical weather prediction system. MONARCH integrates the Chemistry Across Multiple Phases (CAMP) external package, which solves gas- and aerosol-phase chemical processes as a single coupled system. Two documented performance optimizations applied to this stack:

  • Multi-cell simultaneous solving: A strategy that solves multiple instances of a chemical mechanism (represented in the model as grid-cells) concurrently, achieving up to 9x speedup when run over thousands of cells.
  • GPU acceleration of CAMP: A GPU port of CAMP's most time-consuming function delivers up to 1.2x speedup over CPU, and a further memory-access optimization raises the GPU speedup to 1.7x.

Makinote FPGA Emulation Platform

BSC hosts Makinote, an FPGA-based cluster platform designed for pre-silicon emulation of RTL designs, with a particular focus on RISC-V processors. Key documented characteristics:

  • Scale: 96 AMD/Xilinx Alveo U55c FPGAs, supporting emulation of designs up to 750M ASIC gates.
  • FPGA shell: A software tool that abstracts low-level connectivity (PCIe Gen4, DDR4, HBM, 10G/100G Ethernet) so RTL developers can partition designs across multiple FPGAs with minimal effort.
  • RISC-V tooling: Drivers and infrastructure tailored for exploiting RISC-V-based architectures are bundled with the shell.
  • Validation: The platform was validated by emulating a RISC-V processor and running an HPC Challenge application on 32 FPGAs, yielding an 8x performance improvement versus a single FPGA.

RISC-V Multicore Verification (BZL Project)

Within the Barcelona Zettascale Lab (BZL) project, BSC researchers have built a verification methodology for complex RISC-V systems, including out-of-order cores and their cache hierarchies. Documented methodology:

  • Methodology: Universal Verification Methodology (UVM) with co-simulation against a modified Spike ISS used as the reference model.
  • Stimulus: Directed tests drawn from riscv-tests and the RISC-V compliance suite, combined with constrained-random binaries generated by riscv-dv.
  • Coverage: Functional and code coverage analysis is used to identify corner cases, which are then targeted with adjusted generator configurations or additional directed tests.
  • Testbench structure: Reusable UVM environments at both core level and CPU-subsystem level, with dedicated agents for the complete, interrupt, D-cache, and I-cache interfaces. A scoreboard compares DUT outputs against Spike; mismatches, designated end-of-test memory writes, or timeouts terminate the simulation.
  • Assertions: SystemVerilog Assertions (SVAs) are deployed primarily on interfaces of selected modules.

See Also

LINKED ENTITIES

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Barcelona Zettascale Lab PART_OF

CITATIONS

9 sources
9 citations
[1] BSC develops the MONARCH chemical weather prediction system, which integrates the CAMP package for solving gas- and aerosol-phase chemical processes as a single coupled system. Adapting Atmospheric Chemistry Components for Efficient GPU Accelerators
[2] A BSC strategy of simultaneously solving multiple chemical-mechanism instances (grid-cells) achieves up to 9x speedup with thousands of cells. Adapting Atmospheric Chemistry Components for Efficient GPU Accelerators
[3] A GPU implementation of CAMP's most time-consuming function achieves up to 1.2x speedup over CPU, with memory-access optimization raising the GPU speedup to 1.7x. Adapting Atmospheric Chemistry Components for Efficient GPU Accelerators
[4] Makinote is an FPGA-based cluster hosted at BSC-CNS composed of 96 AMD/Xilinx Alveo U55c FPGAs, capable of emulating designs up to 750M ASIC gates. Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs
[5] The Makinote FPGA shell abstracts connectivity to PCIe Gen4, DDR4, HBM, and 10G/100G Ethernet, and ships RISC-V-specific drivers. Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs
[6] Running an HPC Challenge application on 32 Makinote FPGAs delivered an 8x performance improvement over a single FPGA. Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs
[7] BSC's RISC-V multicore verification work was performed as part of the Barcelona Zettascale Lab (BZL) project. Verification of a RISC-V system with multiple cores
[8] BSC's verification methodology uses UVM with Spike ISS as a reference model, drawing on riscv-tests, the compliance suite, and riscv-dv-generated random binaries, supported by functional and code coverage analysis. Verification of a RISC-V system with multiple cores
[9] BSC built reusable UVM testbenches with dedicated agents for complete, interrupt, D-cache, and I-cache interfaces, using a Spike-based scoreboard for DUT comparison and end-of-test signaling via a designated memory write. Verification of a RISC-V system with multiple cores