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Assembly Generator

Concept WIKI v1 · 6/16/2026

An assembly generator is a software tool that programmatically constructs assembly-language test programs, typically to provide stimulus for hardware verification. In the context of microprocessor verification, sequence-based assembly generators build tests by composing instructions into intentional sequences, bridging the gap between fully directed and fully random stimulus generation methods.

Assembly Generator

Definition

An assembly generator is a tool that programmatically produces assembly-language test programs, most commonly used to supply stimulus for hardware (especially microprocessor) verification. The term is applied to generators that emit instruction streams together with the configuration and supporting artifacts (such as linker scripts) needed to form an executable test.

A sequence-based assembly generator is a specific kind of assembly generator that builds tests by composing instructions into named sequences written with a particular verification intent, rather than by relying on either hand-written directed tests or purely unconstrained random streams. Sequence-based generators are designed to bridge the gap between directed and fully random stimulus methods.

Role in Verification

Assembly generators are a category of stimulus-generation tool used in functional verification flows. They sit alongside:

  • Directed test generation, where the engineer hand-writes or scripts a specific instruction stream.
  • Random test generation, where the tool picks instructions and operands from broad distributions.
  • Constraint-based random stimulus generation, where relationships between random variables are expressed declaratively.

Sequence-based assembly generators attempt to combine the controllability of directed tests with the breadth of random stimulus, by allowing the user to express intent at the sequence level while still permitting randomization within and between sequences.

Architecture (as illustrated by SGen)

A typical sequence-based assembly generator is organized into layered building blocks:

  1. Instruction library (inst). The atomic building block. Contains a class hierarchy of instructions organized by type (e.g., load, store, arithmetic).
  2. Sequence library (seq). Each sequence is written with a specific verification intent and is composed of instructions.
  3. Test library (tests). Tests use one or more sequences to achieve a specific verification goal.
  4. Random exerciser (exer). A random exerciser test is generated by randomly mixing sequences together.
  5. Random utilities (randutils). Utility classes (such as weighted sets) that enable randomization and selection among candidates.

This layered organization lets a user scale from a single intentional sequence to a large randomized exerciser that mixes many sequences.

Toolchain Integration

Because assembly generators typically need to emit configuration registers, init code, and linker scripts in addition to the instruction stream itself, a common design pattern is to have the assembly generator emit a .S (assembly) file together with a properly formatted .cfg configuration file, and then feed both into a downstream directed-flow tool that handles configuration parsing, init code generation, and linker script generation. In that arrangement, the assembly generator "piggybacks" onto the directed mode of an existing generator while providing its own sequence-based stimulus content.

Randomization Without a Constraint Engine

Some sequence-based assembly generators deliberately omit a constraint engine. Complex relationships between random variables are instead expressed programmatically, for example by combining:

  • A randomization interface class that exposes distribution primitives, with
  • Closures (e.g., C++11 lambda functions) that capture variables in scope and implement user-defined overrides and inter-variable relationships.

This approach trades declarative constraints for programmatic flexibility while keeping the tool lightweight.

Performance Characteristics

Because assembly generators are typically invoked many times across a verification regression (e.g., 500 runs of an exerciser), runtime speed is a primary concern. A typical sequence-based assembly generator can produce tests of roughly 25k–50k instructions per run, with aggregate throughput on the order of tens of thousands of instructions generated per second, and per-run execution times in the sub-second range. Such speeds are chosen so that the generator adds negligible overhead in terms of simulation compute time and tool licenses.

Implementations

  • SGen — a sequence-based assembly generator implemented in C++11, designed to bridge directed and fully random stimulus methods for microprocessor verification (see linked entity).

LINKED ENTITIES

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CITATIONS

7 sources
7 citations
[1] An assembly generator is a tool that programmatically produces assembly-language test programs used as stimulus for hardware verification. Micro-processor verification using a C++11 sequence-based stimulus engine
[2] A sequence-based assembly generator bridges the gap between directed and fully random stimulus methods. Micro-processor verification using a C++11 sequence-based stimulus engine
[3] The internal architecture of a sequence-based assembly generator is organized into layered libraries: inst (instructions), seq (sequences), tests (tests), exer (random exerciser), and randutils (random utilities). Micro-processor verification using a C++11 sequence-based stimulus engine
[4] A random exerciser test can be generated by randomly mixing sequences together. Micro-processor verification using a C++11 sequence-based stimulus engine
[5] Some sequence-based assembly generators have no constraint engine and instead express relationships between random variables via a randomization interface class combined with closures such as C++11 lambda functions. Micro-processor verification using a C++11 sequence-based stimulus engine
[6] A typical exerciser run generates tests with 25k to 50k instructions; across 500 runs, average execution time is 709 ms, averaging about 31k instructions generated per second. Micro-processor verification using a C++11 sequence-based stimulus engine
[7] An assembly generator can emit an assembly (.S) program and a configuration (.cfg) file that is fed into the directed flow of a downstream test-program generator, allowing it to piggyback on the directed mode. Micro-processor verification using a C++11 sequence-based stimulus engine