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ASMcoret record

CodeArtifact WIKI v1 · 5/25/2026

ASMcoret is an Isabelle record used as the assembler-level configuration type in a microprocessor test-generation case study. It contains delayed and current program-counter fields, general-purpose and special-purpose register files, and memory; its well-formedness is checked by the is_ASMcore predicate.

Overview

ASMcoret is an Isabelle record representing an assembler-level processor configuration. It is defined after the register-file type, where register contents are integers and a register file is a list of those integer register contents. [C1]

type_synonym regcont = int
text ‹contents of register›
type_synonym registers = regcont list
text ‹register file›

record ASMcoret = dpc :: nat
                  pcp :: nat
                  gprs :: registers
                  sprs :: registers
                  mm :: memt

Fields

The record stores: [C1]

  • dpc :: nat — delayed program counter.
  • pcp :: nat — program-counter-related natural-number field.
  • gprs :: registers — general-purpose register file.
  • sprs :: registers — special-purpose register file.
  • mm :: memt — memory component.

Because registers is only a list type, the type itself does not encode the number of registers. The cited model therefore uses a separate well-formedness predicate, is_ASMcore, to restrict valid ASMcoret configurations. [C2]

Well-formedness via is_ASMcore

The is_ASMcore predicate defines well-formed assembler configurations. It requires dpc and pcp to satisfy asmnat, requires both gprs and sprs to have length 32, checks the first 32 general and special registers with asm_int, and requires every data-memory cell read from mm to satisfy asm_int. [C2]

definition is_ASMcore :: ASMcoret ⇒ bool where
 is_ASMcore st ≡ asmnat (dpc st) ∧
        asmnat (pcp st) ∧
        length (gprs st) = 32 ∧
        length (sprs st) = 32 ∧
        (∀ ind < 32. asm_int (reg (gprs st) ind)) ∧
        (∀ ind < 32. asm_int (sreg (sprs st) ind)) ∧
        (∀ ad. asm_int (data_mem_read (mm st) ad))

Role in instruction semantics

The assembler instruction set is defined as an Isabelle datatype instr, with constructors for categories including memory data transfer, constant data transfer, register data transfer, arithmetic/logical operations, test operations, shift operations, control operations, and interrupts. [C3]

Instruction semantics are given by exec_instr, which maps an ASMcoret configuration and an instr to the resulting ASMcoret configuration. Examples in the evidence include arithmetic, logical, and shift instructions that call helper functions such as arith_exec. [C4]

fun exec_instr :: [ASMcoret, instr] ⇒ ASMcoret

Transition function

The transition function Step takes an ASMcoret configuration and returns its successor. It is defined by executing the current instruction selected from the delayed program counter context via current_instr st. [C5]

definition Step :: ASMcoret ⇒ ASMcoret
where Step st ≡ exec_instr st (current_instr st)

The cited study uses these transition relations as the basis for test specifications. The assembler model is described as more abstract than the processor model, making details such as interrupt handling, virtual memory and caching, pipelining, and instruction reordering transparent. [C6]

CITATIONS

6 sources
6 citations
[1] ASMcoret is an Isabelle record whose fields are dpc, pcp, gprs, sprs, and mm; register contents are integers and register files are lists of integers. Test Program Generation for a Microprocessor: A Case Study
[2] The is_ASMcore predicate defines well-formed ASMcoret assembler configurations by requiring valid program-counter values, exactly 32 general-purpose and 32 special-purpose registers, valid register contents, and valid memory-cell contents. Test Program Generation for a Microprocessor: A Case Study
[3] The assembler instruction set is defined as an Isabelle datatype with instruction categories including data transfer, arithmetic/logical, test, shift, control, and interrupt instructions. Test Program Generation for a Microprocessor: A Case Study
[4] exec_instr gives instruction semantics by mapping an ASMcoret configuration and an instruction to the resulting ASMcoret configuration. Test Program Generation for a Microprocessor: A Case Study
[5] Step is defined as a transition function on ASMcoret configurations that executes the current instruction. Test Program Generation for a Microprocessor: A Case Study
[6] The study uses the transition relations as a basis for test specifications, and the assembler model abstracts away processor details such as interrupt handling, virtual memory and caching, pipelining, and instruction reordering. Test Program Generation for a Microprocessor: A Case Study