array constraint handling

Concept

Array constraint handling is an approach to representing and solving constraints over indexed storage without expanding every array update into constraints over every element. In the cited ST processor test-generation work, a naive SSA-style translation is rejected as impractical for large memories; two alternatives are discussed: solver-level read/write constraints (`tabRead` and `tabWrite`) and a two-step alias-based strategy that first fixes equality relationships between array indices and then posts the corresponding constraints.

First seen 6/3/2026

Last seen 6/3/2026

Evidence 2 chunks

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WIKI

Overview

Array constraint handling addresses how reads and writes to arrays are represented in a constraint store. The motivating problem is that an array update can affect the value seen by later reads, especially when two array indices may alias, i.e. refer to the same element.

The cited work contrasts a direct element-wise translation with specialized array-handling strategies. In an SSA-like construction, each assignment to one element of an array of size n introduces 2n - 1 element constraints: two constraints for each of the n - 1 elements not assigned, plus one for the assigned element. For a memory addressed by 24-bit index registers, this leads to a very large number of constraints and is described as impractical in the ST processor setting.

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RELATIONSHIPS

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STCS ← implements 100% 1e

STCS implements array constraint handling via tabRead and tabWrite constraints.

alias coverage criterion ← part of 85% 1e

The alias coverage criterion is defined in the context of array constraint handling.

tabRead constraint ← part of 100% 1e

The tabRead constraint is part of the array constraint handling approach.

tabWrite constraint ← part of 100% 1e

The tabWrite constraint is part of the array constraint handling approach.

LINKED ENTITIES

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tabRead constraint PART_OF Extracted graph relationship

tabWrite constraint PART_OF Extracted graph relationship

STCS IMPLEMENTS Extracted graph relationship

alias coverage criterion PART_OF Extracted graph relationship

CITATIONS

9 sources

9 citations — click to expand

[1] SSA-like array translation creates 2n - 1 element constraints per assignment, which becomes impractical for large memories such as 24-bit-addressed ST processor memory. { Fabrice.Baray,Henri.Michel}

[2] The direct solver-level strategy introduces an array type with tabRead and tabWrite constraints for read and write accesses. { Fabrice.Baray,Henri.Michel}

[3] tabRead and tabWrite maintain consistency through propagations between index equality and array-value equality. { Fabrice.Baray,Henri.Michel}

[4] The direct tabRead/tabWrite approach is order-dependent and limits static dependency analysis because indices are known dynamically. { Fabrice.Baray,Henri.Michel}

[5] The alternative array-manipulation strategy first fixes equality relationships between indices and then posts constraints enforcing those relationships. { Fabrice.Baray,Henri.Michel}

[6] The number of possible relationships among n indices is the nth Bell number, and the paper treats the exponential complexity as acceptable because only a correct combination is searched for. { Fabrice.Baray,Henri.Michel}

[7] An alias coverage criterion is proposed to estimate coverage of different index-relationship choices, with self-referential memory such as mem[mem[i]] where mem[i] = i as a motivating case. { Fabrice.Baray,Henri.Michel}

[8] The alias-based strategy supports splitting the constraint store into independent variable groups and using graph analysis for variable-ordering heuristics. { Fabrice.Baray,Henri.Michel}

[9] A limitation of the alias-based strategy is that selected index relationships can be inconsistent with other constraints; the work relies on solver backtracking and sometimes symbolic solving to recover or avoid such cases. { Fabrice.Baray,Henri.Michel}