ARMv8
ConceptARMv8 (Armv8-A in its application-profile form) is the 64-bit instruction set architecture (ISA) that succeeds ARMv7. It introduces the AArch64 execution state alongside legacy AArch32, and underpins mobile and server-class hardware. Evidence in the corpus covers three threads: (i) polymorphic alphanumeric shellcode generation on ARMv8, (ii) foundational formalization of Armv8-A relaxed virtual-memory semantics in collaboration with Arm and Google, and (iii) ARMv8 as the testing target for the gem5 system simulator, where SearchSYS-based LLM test generation, AFL++ fuzzing, and differential testing revealed gaps in gem5's ARM implementation.
First seen 8/4/2026
Last seen 8/9/2026
Evidence 12 chunks
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ARMv8
Overview
ARMv8 (also referred to as Armv8-A in its application-profile form) is the 64-bit instruction set architecture (ISA) that succeeds the ARMv7 32-bit ISA. It introduces the AArch64 execution state alongside the legacy AArch32 state and is used in a wide range of devices from smartphones to server-class machines. The SearchSYS paper explicitly motivates targeting ARMv8 hardware by noting ARM ISA's relevance from industry's perspective.
NEIGHBORHOOD
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3 connectionsgem5 simulates the ARMv8 architecture.
ARMv8 is a specific version of the ARM Instruction Set Architecture.
SearchSYS is used to evaluate gem5's ARMv8 simulation capabilities.
CITATIONS
17 sources17 citations — click to expand
[1] ARMv8 is the 64-bit instruction set architecture that succeeds ARMv7 and introduces AArch64 execution state alongside legacy AArch32. Search LLM-Based Testing for ARM Simulators
[2] Arbitrary ARMv8 programs can be automatically turned into alphanumeric executable polymorphic shellcodes, broadening the attack surface of ARM-powered devices. ARMv8 Shellcodes from 'A' to 'Z'
[3] Virtual memory in Armv8-A has relaxed-memory concurrency semantics that have not previously been investigated; recent work explores the design space in collaboration with Arm, develops litmus tests, axiomatic-style concurrency models, a tool integrated with the full Armv8-A ISA semantics, and a hardware test harness, with use cases from the pKVM production hypervisor under development by Google. Relaxed virtual memory in Armv8-A (extended version)
[4] Experiments were run on two ARMv8 machines: a CloudLab m400 with 64 GB RAM, single socket, 2.4 GHz, 8 cores, 1 thread per core, running Ubuntu 22.04 ARM; and a UCL machine with 224 CPU cores (Cavium ThunderX2 CN9975, 2.0 GHz) and 130 GB RAM, 2 sockets, 28 cores per socket, 4 threads per core, running Red Hat Linux (aarch64-redhat-linux-gnu). Search LLM-Based Testing for ARM Simulators
[5] Adapting SearchSYS for ARM involved minor script issues related to linker and TinyLlama data, and required setting the ISA parameter to ARM; the Python configuration script required no modifications. Search LLM-Based Testing for ARM Simulators
[6] 13 bugs were identified from LLM-generated test inputs, six of which were unimplemented system calls; four bugs (#1527, #1544, #1547, #1629) were reported to the gem5 bug tracker under 'arch-arm', three of which had received detailed consideration from gem5 developers, with bug #1629 unexpected because it was previously believed to be properly implemented in ARM. Search LLM-Based Testing for ARM Simulators
[7] GPT-3.5-turbo found the highest number of issues (286), followed by Magicoder (175), Llama2 (102), CodeBooga (87), TinyLlama (22), and Phi2 (21); GPT-3.5-turbo (SSBSE 2023) had the fewest with 5. Search LLM-Based Testing for ARM Simulators
[8] Two bug categories (panic and timeout) were identified by executing the simulator, totalling 74 test cases (9 panic and 65 timeouts), while an additional 624 bug-activating test cases were identified using differential testing. Search LLM-Based Testing for ARM Simulators
[9] Each fuzzing campaign ran for 24 hours with five independent repetitions per minimized input corpus; differential testing post-fuzzing used the last repetition, comparing gem5 ARM ISA simulation to results from the two ARMv8 hardware machines. Search LLM-Based Testing for ARM Simulators
[10] During 24-hour fuzzing, TinyLlama had the highest number of fuzzed test inputs exposing issues (87), followed by GPT-3.5-turbo (31), Magicoder (10), Phi2 and Llama2 (6 each), CodeBooga (3); most fuzzed sets identified 2-3 distinct issues, GPT-3.5-turbo finding 4. Search LLM-Based Testing for ARM Simulators
[11] During fuzzing, 93 test cases (19 panic, 1 out-of-memory, 73 timeouts) were identified by executing the simulator, and an additional 126 bug-activating test cases were identified via differential testing. Search LLM-Based Testing for ARM Simulators
[12] One fatal error in src/mem/port_proxy.hh readBlob initially appeared genuine but was determined to be a configuration issue on the UCL machine rather than an ARM ISA bug after comparing the two ARMv8 machines. Search LLM-Based Testing for ARM Simulators
[13] Highest throughput (total fuzzed test inputs) achieved by GPT-3.5-turbo (SSBSE 2023) with 997, followed by Magicoder (986), Llama2 (948), GPT-3.5-turbo (888), CodeBooga (839); smaller LLMs had lower throughput: TinyLlama (776), Phi2 (680). Search LLM-Based Testing for ARM Simulators
[14] Contrary to expectations, ARM is no more stable than X86 ISA in gem5: ~630 missimulation/error instances and 60+ timeouts on ARM vs ~530 missimulation/errors and 30 timeouts on X86; the X86 set is not a subset of the ARM set and reflects different bugs. Search LLM-Based Testing for ARM Simulators
[15] Differential testing used a 50-second time out and ~90 MB memory limit (stack size) for both gem5 simulation and native ARMv8 run. Search LLM-Based Testing for ARM Simulators
[16] LLM test cases are suitable as gem5 C++ regression tests: they have several lines of code, terminate commonly in under 50 seconds, are human-readable, and can be filtered and grouped to target untested areas. Search LLM-Based Testing for ARM Simulators
[17] gem5 developer feedback indicates SearchSYS's ability to tie test cases to ARM ISA features is important and could help development of gem5 also for RISC-V and other ISAs. Search LLM-Based Testing for ARM Simulators