arch/riscv/include/asm/csr.h

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First seen 7/29/2026

Last seen 7/29/2026

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The csr.h file adds CSR defines and bit-field macros implementing the RISC-V Control Transfer Records extension.

Rajnesh Kanwal authored by → 98% 1e

The patch to csr.h was signed off by Rajnesh Kanwal.

CSR_MCTRCTL ← part of 98% 1e

CSR_MCTRCTL is defined in arch/riscv/include/asm/csr.h as the M-mode Control Transfer Records CSR.

CSR_SCTRCTL ← part of 98% 1e

CSR_SCTRCTL is defined in arch/riscv/include/asm/csr.h as the S-mode Control Transfer Records CSR.

CSR_SCTRSTATUS ← part of 98% 1e

CSR_SCTRSTATUS is defined in arch/riscv/include/asm/csr.h as the S-mode CTR status CSR.

CSR_SCTRDEPTH ← part of 98% 1e

CSR_SCTRDEPTH is defined in arch/riscv/include/asm/csr.h as the S-mode CTR depth CSR.

CSR_VSCTRCTL ← part of 98% 1e

CSR_VSCTRCTL is defined in arch/riscv/include/asm/csr.h as the VS-mode Control Transfer Records CSR.