address collision

Concept

Address collision refers to a situation in which two or more distinct entities (such as transactions, accesses, or messages) target the same memory or logical address. In verification contexts, the term is used to describe concurrent CPU and DMA accesses that hit the same address, and in steganographic coding, it refers to multiple candidate messages mapping to the same output token.

First seen 7/8/2026

Last seen 7/8/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

An address collision is an event in which two or more distinct operations, actors, or code paths attempt to act on the same address (memory location, identifier, or token index) at the same time or within the same mapping. The concept appears in two principal technical domains supported by the evidence: hardware verification test generation, and provably secure steganography.

Address Collisions in Hardware Verification

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

LINKED ENTITIES

3 links

Constrained Random Verification context The patent evidence places address collisions explicitly within the constrained-random verification methodology, as an inter-scenario event between interleaved test templates.

inter-scenario event related The patent explicitly names address collisions between CPU and DMA accesses as an example of an inter-scenario event.

test case generator related The patent attributes the deliberate generation of address collisions to the test case generator's global knowledge of design state and resources.

CITATIONS

3 sources

3 citations — click to collapse

[1] An address collision between CPU accesses and DMAs originating from different test templates is given as an explicit example of an inter-scenario event in constrained-random verification. US7627843B2 - Dynamically interleaving randomly generated test cases

[2] A test case generator with global knowledge of design state can deliberately engineer inter-scenario events such as address collisions by interleaving independently defined test templates. US7627843B2 - Dynamically interleaving randomly generated test cases

[3] In provably secure steganography based on adaptive dynamic sampling, collision cases where multiple candidate messages map to the same token are handled via a bounded, dynamically expanded collision set. Provable Secure Steganography Based on Adaptive Dynamic Sampling