Synopsys Inc.
OrganizationSynopsys Inc. is identified in the provided evidence through Synopsys-affiliated authors and the Synopsys VCS constraint solver, which was used in a hierarchical constrained-random approach for generating AMD microcode verification stimuli.
First seen 5/24/2026
Last seen 6/4/2026
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Overview
Synopsys Inc. appears in the provided evidence as the affiliation of Alex Wakefield and Padmaraj Ramachandran, co-authors of the article "Generating AMD microcode stimuli using VCS constraint solver." The article also discusses use of the Synopsys VCS constraint solver in a verification methodology for generating AMD microcode stimuli.[1][2]
VCS constraint solver in verification
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6 sources6 citations — click to expand
[1] Synopsys Inc. is the affiliation of Alex Wakefield and Padmaraj Ramachandran in the cited article. Generating AMD microcode stimuli using VCS constraint solver
[2] The article discusses using the Synopsys VCS constraint solver in a hierarchical constrained-random approach to accelerate microcode stimulus generation, reduce memory consumption, and bias distributions toward corner cases. Generating AMD microcode stimuli using VCS constraint solver
[3] SystemVerilog constraint-language constructs were used to describe microcode instruction attribute combinations and control value distributions for individual fields. Generating AMD microcode stimuli using VCS constraint solver
[4] The described opcode generator had an upper SystemVerilog random-sequence layer with weighted knobs and a lower opcode-class layer randomized with constraints and weights. Generating AMD microcode stimuli using VCS constraint solver
[5] The single-class prototype contained constraints for all opcodes and is described as having approximately 100 random variables and 800 constraint equations. Generating AMD microcode stimuli using VCS constraint solver
[6] The hierarchical object-oriented approach used a base class for global constraints and subclasses for related opcode groups, and the source states that this reduced memory requirements and increased performance. Generating AMD microcode stimuli using VCS constraint solver