Checkpoint Table
ConceptA Checkpoint Table (CKPT) is a hardware array in a register-renaming stage that stores snapshots of the Register Alias Table when branch instructions are encountered, enabling faster restoration after pipeline flushes caused by branch mispredictions.
First seen 5/28/2026
Last seen 5/28/2026
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Overview
A Checkpoint Table (CKPT) is a hardware array used in a processor register-renaming stage. In the cited RISC-V superscalar processor design, the register-renaming stage includes a Free List (FL), a Register Alias Table (RAT), and the Checkpoint Table.[C1]
Role in register renaming
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1 connectionsThe Checkpoint Table is part of the register renaming stage.
LINKED ENTITIES
1 linksCITATIONS
6 sources6 citations — click to expand
[1] In the cited processor design, the register-renaming stage includes a Free List, Register Alias Table, and Checkpoint Table. [PDF] UVM-based verification of RISC-V superscalar processors
[2] The Checkpoint Table is used to take snapshots of the Register Alias Table, with one snapshot taken whenever an incoming branch instruction is encountered. [PDF] UVM-based verification of RISC-V superscalar processors
[3] The Register Alias Table contains the most recent mapping of each logical register specifier to a physical destination register. [PDF] UVM-based verification of RISC-V superscalar processors
[4] The Checkpoint Table expedites restoration of register-renaming state after pipeline flushes, and on a mispredicted branch the RAT is restored using the checkpoint saved for the offending branch instruction. [PDF] UVM-based verification of RISC-V superscalar processors
[5] During restoration after an offending instruction, physical destination registers allocated after that instruction are returned to the Free List. [PDF] UVM-based verification of RISC-V superscalar processors
[6] The described register-renaming implementation uses a pool of physical registers and replaces logical register specifiers with physical register specifiers. [PDF] UVM-based verification of RISC-V superscalar processors